2025-03-27 06:01:36 [INFO] transceiver.py:157 Init transceiver 'BTS@172.18.161.20:5700' 2025-03-27 06:01:36 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.161.20:5802) 2025-03-27 06:01:36 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.161.20:5801) 2025-03-27 06:01:36 [INFO] transceiver.py:157 Init transceiver 'MS@172.18.161.22:6700' 2025-03-27 06:01:36 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.161.22:6802) 2025-03-27 06:01:36 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.161.22:6801) 2025-03-27 06:01:36 [INFO] transceiver.py:157 Init transceiver 'TRX1@172.18.161.20:5700/1' 2025-03-27 06:01:36 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.161.20:5804) 2025-03-27 06:01:36 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.161.20:5803) 2025-03-27 06:01:36 [INFO] transceiver.py:157 Init transceiver 'TRX2@172.18.161.20:5700/2' 2025-03-27 06:01:36 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.161.20:5806) 2025-03-27 06:01:36 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.161.20:5805) 2025-03-27 06:01:36 [INFO] transceiver.py:157 Init transceiver 'TRX3@172.18.161.20:5700/3' 2025-03-27 06:01:36 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.161.20:5808) 2025-03-27 06:01:36 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.161.20:5807) 2025-03-27 06:01:36 [INFO] fake_trx.py:426 Init complete 2025-03-27 06:01:36 [INFO] fake_trx.py:457 Setting real time process scheduler to SCHED_RR, priority 30 2025-03-27 06:01:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:01:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:01:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:01:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:01:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:01:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:01:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:01:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 0 -> 1 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:01:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:01:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 0 -> 1 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:01:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:01:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 0 -> 1 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:01:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:01:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 0 -> 1 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:01:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:01:40 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:01:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:01:41 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:41 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:01:41 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:01:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:01:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:01:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:01:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:01:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:01:54 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:01:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:01:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:01:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:01:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:01:59 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:01:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:01:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:01:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:01:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:01:59 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:01:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:00 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:02:05 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:02:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=0 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=1 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=2 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=3 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=4 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=5 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=6 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=106 tn=7 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=2 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=3 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=4 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0 2025-03-27 06:02:05 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -194us; resetting the clock 2025-03-27 06:02:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:02:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:05 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:02:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:02:10 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:02:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:02:11 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:02:11 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:11 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:02:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:02:16 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:02:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:02:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:02:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:17 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:02:22 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:02:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:02:22 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:02:22 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:02:22 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:02:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:02:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:02:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:31 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1939 tn=5 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:02:31 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1939 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:02:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=0 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=1 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=2 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=3 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=4 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=5 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=6 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6770 tn=7 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=0 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=1 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=2 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=3 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=4 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=5 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=6 bl=148 pwr=0 2025-03-27 06:02:53 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=6772): ver=1 fn=6771 tn=7 bl=148 pwr=0 2025-03-27 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:02:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:00 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:03:00 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:03:01 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:03:01 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:03:02 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:03:02 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:03:03 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:03:03 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:04 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:03:04 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:05 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:03:05 [DEBUG] clck_gen.py:128 IND CLOCK 9384 2025-03-27 06:03:05 [DEBUG] clck_gen.py:128 IND CLOCK 9486 2025-03-27 06:03:06 [DEBUG] clck_gen.py:128 IND CLOCK 9588 2025-03-27 06:03:06 [DEBUG] clck_gen.py:128 IND CLOCK 9690 2025-03-27 06:03:07 [DEBUG] clck_gen.py:128 IND CLOCK 9792 2025-03-27 06:03:07 [DEBUG] clck_gen.py:128 IND CLOCK 9894 2025-03-27 06:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 9996 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 10098 2025-03-27 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 10200 2025-03-27 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 10302 2025-03-27 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 10404 2025-03-27 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 10506 2025-03-27 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 10608 2025-03-27 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 10710 2025-03-27 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 10812 2025-03-27 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 10914 2025-03-27 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 11016 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 11118 2025-03-27 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 11220 2025-03-27 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 11322 2025-03-27 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 11424 2025-03-27 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 11526 2025-03-27 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 11628 2025-03-27 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 11730 2025-03-27 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 11832 2025-03-27 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 11934 2025-03-27 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 12036 2025-03-27 06:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 12138 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 12240 2025-03-27 06:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 12342 2025-03-27 06:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 12444 2025-03-27 06:03:20 [DEBUG] clck_gen.py:128 IND CLOCK 12546 2025-03-27 06:03:20 [DEBUG] clck_gen.py:128 IND CLOCK 12648 2025-03-27 06:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 12750 2025-03-27 06:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 12852 2025-03-27 06:03:21 [DEBUG] clck_gen.py:128 IND CLOCK 12954 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 13056 2025-03-27 06:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:22 [DEBUG] clck_gen.py:128 IND CLOCK 13158 2025-03-27 06:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 13260 2025-03-27 06:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 13362 2025-03-27 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 13464 2025-03-27 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 13566 2025-03-27 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 13668 2025-03-27 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 13770 2025-03-27 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 13872 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 13974 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 14076 2025-03-27 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 14178 2025-03-27 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 14280 2025-03-27 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 14382 2025-03-27 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 14484 2025-03-27 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 14586 2025-03-27 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 14688 2025-03-27 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 14790 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 14892 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 14994 2025-03-27 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 15096 2025-03-27 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 15198 2025-03-27 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 15300 2025-03-27 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 15402 2025-03-27 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 15504 2025-03-27 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 15606 2025-03-27 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 15708 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 15810 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 15912 2025-03-27 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 16014 2025-03-27 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 16116 2025-03-27 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 16218 2025-03-27 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 16320 2025-03-27 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 16422 2025-03-27 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 16524 2025-03-27 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 16626 2025-03-27 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 16728 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 16830 2025-03-27 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 16932 2025-03-27 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 17034 2025-03-27 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 17136 2025-03-27 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 17238 2025-03-27 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 17340 2025-03-27 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 17442 2025-03-27 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 17544 2025-03-27 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 17646 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 17748 2025-03-27 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 17850 2025-03-27 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 17952 2025-03-27 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 18054 2025-03-27 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 18156 2025-03-27 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 18258 2025-03-27 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 18360 2025-03-27 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 18462 2025-03-27 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 18564 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:03:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 18666 2025-03-27 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 18768 2025-03-27 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 18870 2025-03-27 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 18972 2025-03-27 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 19074 2025-03-27 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 19176 2025-03-27 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 19278 2025-03-27 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 19380 2025-03-27 06:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 19482 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:03:52 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=19532 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:03:52 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=19532 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:03:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:03:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:03:52 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:03:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:03:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:03:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:03:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:03:57 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:03:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:03:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:03:57 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:04:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:04:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:04:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:04:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:04:02 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:04:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:04:02 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:04:02 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:02 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:04:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:04:12 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:04:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:04:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:04:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:04:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:04:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:04:17 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:04:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:04:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:04:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:04:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:24 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1562 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:24 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1562 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:04:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:32 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3265 tn=3 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:32 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3265 tn=4 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:32 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3265 tn=5 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:32 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3265 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:32 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3265 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:04:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:04:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:04:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:04:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:04:46 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:04:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:04:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:04:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:04:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:04:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:04:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:04:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:04:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:04:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:04:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:04:51 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:04:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:04:52 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:04:52 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:04:52 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:04:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:17 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=5631 tn=4 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:05:25 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:26 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:05:26 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:05:27 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:05:27 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:05:28 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:05:29 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:05:29 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:05:30 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:05:30 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:31 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:05:31 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:05:31 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1160us; resetting the clock 2025-03-27 06:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:05:32 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 9384 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 9486 2025-03-27 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 9588 2025-03-27 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 9690 2025-03-27 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 9792 2025-03-27 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 9894 2025-03-27 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 9996 2025-03-27 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 10098 2025-03-27 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 10200 2025-03-27 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 10302 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 10404 2025-03-27 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 10506 2025-03-27 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 10608 2025-03-27 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 10710 2025-03-27 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 10812 2025-03-27 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 10914 2025-03-27 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 11016 2025-03-27 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 11118 2025-03-27 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 11220 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 11322 2025-03-27 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 11424 2025-03-27 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 11526 2025-03-27 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 11628 2025-03-27 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 11730 2025-03-27 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 11832 2025-03-27 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 11934 2025-03-27 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 12036 2025-03-27 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 12138 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 12240 2025-03-27 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 12342 2025-03-27 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 12444 2025-03-27 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 12546 2025-03-27 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 12648 2025-03-27 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 12750 2025-03-27 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 12852 2025-03-27 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 12954 2025-03-27 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 13056 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 13158 2025-03-27 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 13260 2025-03-27 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 13362 2025-03-27 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 13464 2025-03-27 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 13566 2025-03-27 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 13668 2025-03-27 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 13770 2025-03-27 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 13872 2025-03-27 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 13974 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:05:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 14076 2025-03-27 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 14178 2025-03-27 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 14280 2025-03-27 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 14382 2025-03-27 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 14484 2025-03-27 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 14586 2025-03-27 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 14688 2025-03-27 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 14790 2025-03-27 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 14892 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 14994 2025-03-27 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 15096 2025-03-27 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 15198 2025-03-27 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 15300 2025-03-27 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 15402 2025-03-27 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 15504 2025-03-27 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 15606 2025-03-27 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 15708 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 15810 2025-03-27 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 15912 2025-03-27 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 16014 2025-03-27 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 16116 2025-03-27 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 16218 2025-03-27 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 16320 2025-03-27 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 16422 2025-03-27 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 16524 2025-03-27 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 16626 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 16728 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 16830 2025-03-27 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 16932 2025-03-27 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 17034 2025-03-27 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 17136 2025-03-27 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 17238 2025-03-27 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 17340 2025-03-27 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 17442 2025-03-27 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 17544 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 17646 2025-03-27 06:06:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 17748 2025-03-27 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 17850 2025-03-27 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 17952 2025-03-27 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 18054 2025-03-27 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 18156 2025-03-27 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 18258 2025-03-27 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 18360 2025-03-27 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 18462 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:06:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:06:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:06:17 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:17 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=18566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:06:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:06:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:06:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:06:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:06:22 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:06:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:06:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:06:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:06:22 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:06:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:06:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:06:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:06:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:06:27 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:06:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:06:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:06:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:27 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:06:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:06:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:06:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:06:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:04 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:07:04 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:07:05 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:07:05 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:07:06 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:07:06 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:07:07 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:07:07 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:07:08 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:07:08 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:09 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:07:09 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:07:10 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:07:10 [DEBUG] clck_gen.py:128 IND CLOCK 9384 2025-03-27 06:07:11 [DEBUG] clck_gen.py:128 IND CLOCK 9486 2025-03-27 06:07:11 [DEBUG] clck_gen.py:128 IND CLOCK 9588 2025-03-27 06:07:11 [DEBUG] clck_gen.py:128 IND CLOCK 9690 2025-03-27 06:07:12 [DEBUG] clck_gen.py:128 IND CLOCK 9792 2025-03-27 06:07:12 [DEBUG] clck_gen.py:128 IND CLOCK 9894 2025-03-27 06:07:13 [DEBUG] clck_gen.py:128 IND CLOCK 9996 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:13 [DEBUG] clck_gen.py:128 IND CLOCK 10098 2025-03-27 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 10200 2025-03-27 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 10302 2025-03-27 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 10404 2025-03-27 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 10506 2025-03-27 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 10608 2025-03-27 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 10710 2025-03-27 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 10812 2025-03-27 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 10914 2025-03-27 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 11016 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 11118 2025-03-27 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 11220 2025-03-27 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 11322 2025-03-27 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 11424 2025-03-27 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 11526 2025-03-27 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 11628 2025-03-27 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 11730 2025-03-27 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 11832 2025-03-27 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 11934 2025-03-27 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 12036 2025-03-27 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 12138 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 12240 2025-03-27 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 12342 2025-03-27 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 12444 2025-03-27 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 12546 2025-03-27 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 12648 2025-03-27 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 12750 2025-03-27 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 12852 2025-03-27 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 12954 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 13056 2025-03-27 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 13158 2025-03-27 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 13260 2025-03-27 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 13362 2025-03-27 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 13464 2025-03-27 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 13566 2025-03-27 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 13668 2025-03-27 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 13770 2025-03-27 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 13872 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 13974 2025-03-27 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 14076 2025-03-27 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 14178 2025-03-27 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 14280 2025-03-27 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 14382 2025-03-27 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 14484 2025-03-27 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 14586 2025-03-27 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 14688 2025-03-27 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 14790 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 14892 2025-03-27 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 14994 2025-03-27 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 15096 2025-03-27 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 15198 2025-03-27 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 15300 2025-03-27 06:07:38 [DEBUG] clck_gen.py:128 IND CLOCK 15402 2025-03-27 06:07:38 [DEBUG] clck_gen.py:128 IND CLOCK 15504 2025-03-27 06:07:39 [DEBUG] clck_gen.py:128 IND CLOCK 15606 2025-03-27 06:07:39 [DEBUG] clck_gen.py:128 IND CLOCK 15708 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:40 [DEBUG] clck_gen.py:128 IND CLOCK 15810 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:40 [DEBUG] clck_gen.py:128 IND CLOCK 15912 2025-03-27 06:07:41 [DEBUG] clck_gen.py:128 IND CLOCK 16014 2025-03-27 06:07:41 [DEBUG] clck_gen.py:128 IND CLOCK 16116 2025-03-27 06:07:42 [DEBUG] clck_gen.py:128 IND CLOCK 16218 2025-03-27 06:07:42 [DEBUG] clck_gen.py:128 IND CLOCK 16320 2025-03-27 06:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 16422 2025-03-27 06:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 16524 2025-03-27 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 16626 2025-03-27 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 16728 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 16830 2025-03-27 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 16932 2025-03-27 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 17034 2025-03-27 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 17136 2025-03-27 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 17238 2025-03-27 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 17340 2025-03-27 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 17442 2025-03-27 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 17544 2025-03-27 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 17646 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 17748 2025-03-27 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 17850 2025-03-27 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 17952 2025-03-27 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 18054 2025-03-27 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 18156 2025-03-27 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 18258 2025-03-27 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 18360 2025-03-27 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 18462 2025-03-27 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 18564 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:07:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 18666 2025-03-27 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 18768 2025-03-27 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 18870 2025-03-27 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 18972 2025-03-27 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 19074 2025-03-27 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 19176 2025-03-27 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 19278 2025-03-27 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 19380 2025-03-27 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 19482 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:07:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:07:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:07:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:07:57 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19522 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19522 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19522 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19522 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19522 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19522 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:07:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=19523 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:08:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:08:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:08:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:08:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:08:02 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:08:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:08:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:08:02 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:08:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:08:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:08:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:08:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:08:07 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:08:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:08:07 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:08:07 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:08:07 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:08:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:14 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:08:14 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:08:15 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:16 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:08:16 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:08:17 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:22 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3302 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:22 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=3302 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:08:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:08:32 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:32 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:08:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:08:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:08:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:08:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:08:37 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:08:37 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:08:37 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:08:37 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:08:37 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:08:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:08:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:41 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=938 tn=4 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:41 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=938 tn=5 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:41 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=938 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:41 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=938 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:08:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:08:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:08:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:08:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:45 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1770 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:45 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1770 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:08:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:08:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:08:56 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=4179 tn=5 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:08:56 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=4179 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:56 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=4179 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:08:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:08:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:08:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:08:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:09:06 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:09:06 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:09:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:09:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:09:07 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:09:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6416 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=6417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:09:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:09:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:09:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:09:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:09:12 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:09:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:09:12 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:09:12 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:09:12 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:09:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:09:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:20 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1770 tn=4 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:20 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1770 tn=5 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:20 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1770 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:20 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=1770 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:25 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=2810 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:09:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:09:36 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:36 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:09:37 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:09:38 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:09:38 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:09:39 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:40 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=6219 tn=4 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:40 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=6219 tn=5 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:40 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=6219 tn=6 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:40 [WARNING] transceiver.py:287 (MS@172.18.161.22:6700) RX TRXD message (fn=6219 tn=7 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:09:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 9384 2025-03-27 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 9486 2025-03-27 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 9588 2025-03-27 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 9690 2025-03-27 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 9792 2025-03-27 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 9894 2025-03-27 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 9996 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:09:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 10098 2025-03-27 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 10200 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:09:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:09:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:09:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:09:59 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:10:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:10:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:10:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:10:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:10:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:10:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:10:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:10:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:10:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:10:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:10:04 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:10:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:10:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:10:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:10:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:10:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:10:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:10:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:06 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:10:07 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:10:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:07 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:10:08 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:08 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:10:24 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:10:25 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:10:26 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:10:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:10:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:10:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:10:28 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:10:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:10:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:10:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:10:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:10:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:10:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:10:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:10:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:10:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:10:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:10:33 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:10:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:10:34 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:10:34 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:10:34 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:10:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:10:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:10:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:10:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:10:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:10:39 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:10:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:10:40 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:10:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:10:41 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:10:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:10:47 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:10:47 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:10:48 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:10:48 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:10:49 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:10:49 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:10:50 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:10:50 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:10:51 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:10:51 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:10:55 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:10:55 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:10:56 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:10:56 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:10:57 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:10:57 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:10:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:10:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:10:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:10:57 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:10:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5229 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:11:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:11:02 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:11:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:02 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:11:03 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:11:03 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:03 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:11:03 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:03 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:11:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:11:12 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:11:12 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:11:13 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:11:14 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:16 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:11:21 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:11:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:11:21 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:21 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:11:21 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:22 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:11:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:22 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:11:22 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:23 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:11:23 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:23 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:11:24 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:11:25 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:26 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:11:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:11:26 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:27 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:11:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:11:28 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:11:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:11:29 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:11:29 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:11:30 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:11:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:11:31 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:31 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:11:31 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2218 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:31 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2218 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:31 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2218 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:31 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:31 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:31 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:11:36 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:11:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:11:36 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:36 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:11:36 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:40 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:11:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=814 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=814 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:11:45 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:11:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:11:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:11:45 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:11:45 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:11:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD HANDOVER 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:11:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:11:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:47 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:11:52 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:11:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:52 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:11:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:11:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:11:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:11:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:11:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:11:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:11:57 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:11:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:11:57 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:11:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:11:58 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:11:58 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:11:58 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:11:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:11:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:03 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:12:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:12:08 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:12:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:12:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:12:09 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:12:09 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:12:09 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:12:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:12:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:12:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:12:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:19 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:12:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:12:24 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:12:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:12:25 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:12:25 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:12:25 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:12:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:12:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:12:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:27 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:12:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:28 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:12:37 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:12:37 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:12:38 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:12:38 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:39 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:12:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:12:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:12:44 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:12:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:12:45 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:12:45 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:12:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:12:45 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:12:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:12:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:12:45 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:49 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:12:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:12:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:12:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:12:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:12:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:53 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:12:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:12:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:12:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:12:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:12:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:12:58 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:12:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:12:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:12:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:12:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:12:59 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:12:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:12:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:12:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:12:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:12:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:12:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:12:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:12:59 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:12:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:12:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:13:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:13:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:13:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:13:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:13:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:13:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:13:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:13:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:13:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:13:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:13:04 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:13:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:13:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:13:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:13:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:13:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:13:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:13:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:13:13 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:13 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:13:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:13:21 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:13:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:13:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:13:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:13:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:13:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:13:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:13:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:13:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:13:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:13:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:13:26 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:13:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:13:27 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:13:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:13:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:27 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:13:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:13:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:27 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:13:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:13:35 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:35 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:13:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:13:43 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:13:43 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:43 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:13:43 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:13:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:13:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:13:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:13:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:13:48 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:13:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:13:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:13:48 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:48 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:13:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:13:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:48 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:49 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:13:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:49 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:13:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:13:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:13:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:13:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:13:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:13:56 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:13:56 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:14:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:14:04 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:14:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:14:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:14:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:14:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:14:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:14:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:14:10 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:14:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:14:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:14:10 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:10 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:10 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:14:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:14:10 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:10 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:14:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:14:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:14:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:14:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:14:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:14:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:14:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:14:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:14:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:14:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:14:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:14:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:14:16 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:14:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:14:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:14:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:14:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:14:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:14:25 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:25 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:14:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:14:33 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:14:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:14:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:14:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:14:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:14:38 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:14:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:14:38 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:38 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:38 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:14:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:14:38 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:38 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:14:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:14:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:14:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:14:46 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:46 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:14:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:14:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:14:54 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:14:54 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:02 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:02 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:15:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:15:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:15:10 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:15:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:15:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:15:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:15:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:15:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:15:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:15:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:15:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:15:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:15:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:15:15 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:15:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:15:16 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:16 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:16 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:16 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:16 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:15:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:15:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:15:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:15:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:15:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:15:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:15:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:24 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:24 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:32 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:32 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:15:40 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:40 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:40 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:40 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:15:42 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:15:42 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:15:43 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:15:43 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:48 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:15:55 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:15:55 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:15:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:15:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:15:56 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:15:56 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:15:56 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:15:57 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 9384 2025-03-27 06:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 9486 2025-03-27 06:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 9588 2025-03-27 06:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 9690 2025-03-27 06:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 9792 2025-03-27 06:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 9894 2025-03-27 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 9996 2025-03-27 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 10098 2025-03-27 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 10200 2025-03-27 06:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 10302 2025-03-27 06:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 10404 2025-03-27 06:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 10506 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:16:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:16:04 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:16:04 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 10608 2025-03-27 06:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 10710 2025-03-27 06:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 10812 2025-03-27 06:16:06 [DEBUG] clck_gen.py:128 IND CLOCK 10914 2025-03-27 06:16:06 [DEBUG] clck_gen.py:128 IND CLOCK 11016 2025-03-27 06:16:07 [DEBUG] clck_gen.py:128 IND CLOCK 11118 2025-03-27 06:16:07 [DEBUG] clck_gen.py:128 IND CLOCK 11220 2025-03-27 06:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 11322 2025-03-27 06:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 11424 2025-03-27 06:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 11526 2025-03-27 06:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 11628 2025-03-27 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 11730 2025-03-27 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 11832 2025-03-27 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 11934 2025-03-27 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 12036 2025-03-27 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 12138 2025-03-27 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 12240 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:16:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:16:12 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:16:12 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 12342 2025-03-27 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 12444 2025-03-27 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 12546 2025-03-27 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 12648 2025-03-27 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 12750 2025-03-27 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 12852 2025-03-27 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 12954 2025-03-27 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 13056 2025-03-27 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 13158 2025-03-27 06:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 13260 2025-03-27 06:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 13362 2025-03-27 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 13464 2025-03-27 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 13566 2025-03-27 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 13668 2025-03-27 06:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 13770 2025-03-27 06:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 13872 2025-03-27 06:16:20 [DEBUG] clck_gen.py:128 IND CLOCK 13974 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:16:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:16:20 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=14071 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:16:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:16:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:16:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:16:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:16:25 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:16:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:16:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:16:25 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:16:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:16:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:16:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:16:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:16:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:16:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:16:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:16:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:16:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:16:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:16:30 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:16:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:16:31 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:16:31 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:16:31 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:16:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:16:31 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:16:31 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:16:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:16:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:16:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:35 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:16:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:16:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:16:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:16:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:16:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:16:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:16:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:16:39 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:16:39 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:16:43 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:16:43 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:16:46 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:16:46 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:16:47 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:16:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:16:47 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:16:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:16:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:16:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:16:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:16:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:16:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:16:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:16:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:16:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:16:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:16:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:16:52 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:16:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:16:52 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:16:53 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:16:53 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:53 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:16:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:16:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:16:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:16:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:16:59 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:16:59 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=0 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=1 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=2 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=3 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=4 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=5 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=6 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1756 tn=7 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=0 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=1 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=2 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=3 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=4 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=5 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=6 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1757 tn=7 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=0 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=1 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=2 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=3 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=4 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=5 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=6 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1759): ver=1 fn=1758 tn=7 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=0 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=1 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=2 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=3 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=4 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=5 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=6 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1779): ver=1 fn=1778 tn=7 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=1 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=2 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=3 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=4 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=5 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=6 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1777 tn=7 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=0 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=1 bl=148 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=2 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=3 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=4 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=5 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=6 pwr=0 2025-03-27 06:17:00 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1779): fn=1778 tn=7 pwr=0 2025-03-27 06:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:01 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:17:06 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:17:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:17:06 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:17:06 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:06 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:17:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:17:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:17:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1357 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1358 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1359 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1360 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1361 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1362 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=0 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=1 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=2 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=3 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=4 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1364): ver=1 fn=1363 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1356 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1356 tn=6 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1356 tn=7 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=0 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=1 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=2 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=3 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=4 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=5 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=6 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1357 tn=7 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=0 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=1 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=2 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=3 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=4 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=5 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=6 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1364): fn=1358 tn=7 pwr=0 2025-03-27 06:17:12 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -312us; resetting the clock 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1365): ver=1 fn=1364 tn=6 bl=148 pwr=0 2025-03-27 06:17:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1365): ver=1 fn=1364 tn=7 bl=148 pwr=0 2025-03-27 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:17:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:17:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:17:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:17:20 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:17:20 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:17:20 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:17:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:17:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:17:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:17:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:26 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:17:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:17:31 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:17:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:17:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:17:32 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:17:32 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:32 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:17:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:17:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:17:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:17:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:42 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:17:42 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:17:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:42 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:17:47 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:17:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:17:47 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:17:47 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:17:47 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:17:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:17:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:17:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:17:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:17:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:17:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:17:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:17:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:18:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:18:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:18:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:18:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:18:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:18:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:07 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:18:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4449 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:18:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:18:12 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:18:13 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:13 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:13 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:18:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:18:13 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:13 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD NOHANDOVER 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD NOHANDOVER 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:18:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:18:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:18:19 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:19 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:19 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:18:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:18:19 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:19 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD NOHANDOVER 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:19 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD NOHANDOVER 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:20 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:18:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:20 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:18:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:18:25 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:18:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:18:26 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:18:26 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:26 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:26 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:18:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:26 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:18:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=212 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=212 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=212 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=212 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=212 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:26 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:18:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:18:31 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:18:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:18:32 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:32 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:32 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:18:32 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:18:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:18:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:42 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:18:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:18:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:18:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:18:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:18:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:18:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:18:47 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:18:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:18:47 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:18:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:18:48 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:18:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:48 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:18:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:18:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:18:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:18:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:18:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:18:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:18:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:18:58 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:19:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:19:03 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:19:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:19:04 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:19:04 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:04 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:19:04 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:19:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:19:05 [DEBUG] fake_trx.py:264 (MS@172.18.161.22:6700) Recv SETTA cmd 2025-03-27 06:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:19:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:19:06 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:19:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:06 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:19:07 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:19:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:07 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:19:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:19:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:19:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:19:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:19:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:19:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:19:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:19:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:23 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:19:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:19:28 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:19:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:19:29 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:19:29 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:29 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:19:29 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:19:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:19:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:19:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:39 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:39 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:19:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:19:44 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:19:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:19:45 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:19:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:45 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:19:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:19:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:19:46 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:52 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:19:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:19:57 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:19:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:19:57 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:19:57 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:57 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:19:57 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:19:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:19:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:01 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:20:01 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:02 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:20:02 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:20:03 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:20:03 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:20:07 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:07 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=2296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:20:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:20:12 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:20:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:20:13 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:20:13 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:20:13 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:20:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:20:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:20:20 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:20:20 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:20 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:20 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:21 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:20:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:20:26 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:20:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:26 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:20:26 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:20:26 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:20:26 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:26 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:27 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:27 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:20:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:20:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:20:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:20:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:20:35 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:20:35 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:20:36 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:36 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:37 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:20:37 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:20:38 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:20:38 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:39 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:20:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:20:45 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:20:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:20:45 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:20:45 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:20:45 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:20:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:20:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:20:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:46 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:20:46 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:47 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:20:47 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:20:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:48 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:20:48 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:49 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:20:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:20:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:20:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:20:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:20:59 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:20:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:20:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:20:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:20:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:59 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:20:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:20:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:20:59 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:21:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:21:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:21:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:21:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:21:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:21:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:21:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:21:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:21:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:21:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:21:04 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:21:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:04 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:21:04 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:21:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:21:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:21:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:21:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:21:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:05 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:05 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:21:06 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:21:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:06 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:21:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:21:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:21:07 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:07 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:21:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:21:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:21:21 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:21:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:21:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:21:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:21:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3740 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:21:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3740 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:21:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3740 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:21:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:21:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:21:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:21:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:21:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:21:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:21:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:21:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:21:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:21:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:21:26 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:21:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:26 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:21:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:21:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:21:27 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:21:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:21:43 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:21:43 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:21:44 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:21:44 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:21:45 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:21:45 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:21:46 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:21:46 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:21:46 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:21:47 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:21:47 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:21:48 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:21:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:21:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:21:48 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:21:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:21:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:21:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:21:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:21:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:21:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:21:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:21:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:21:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:21:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:21:53 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:21:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:21:53 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:21:54 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:21:54 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:21:54 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:21:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:21:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:21:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:56 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:21:56 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:57 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:21:57 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:21:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:21:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:21:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:21:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:21:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:21:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:21:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:22:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:22:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:22:03 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:22:04 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:22:04 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:22:05 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:22:05 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:22:06 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:22:11 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:22:11 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:22:12 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:22:12 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:22:13 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:22:13 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:22:14 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:22:14 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:22:14 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:22:15 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:22:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:22:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:22:15 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:22:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:22:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:22:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:22:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:22:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:22:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:22:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:22:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:22:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:22:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:22:20 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:22:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:20 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:22:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:22:21 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:22:21 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:22:21 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:22:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:22:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:22:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:22:30 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:22:31 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:22:32 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:22:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:22:33 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:22:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:22:40 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:22:40 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:22:41 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:22:41 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:22:54 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -23001us; resetting the clock 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:22:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:22:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:22:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:22:54 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:22:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:22:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:22:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:22:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:22:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:22:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:22:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:22:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:22:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:22:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:22:59 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:22:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:22:59 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:23:00 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:23:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:23:00 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:23:00 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:23:00 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:23:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:23:00 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:03 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:23:03 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:04 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:23:04 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:23:07 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:23:07 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:23:10 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:23:10 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:23:11 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:23:11 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:23:12 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:23:12 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:23:19 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:23:19 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:23:20 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:23:20 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:23:21 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:23:21 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:23:24 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:23:24 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=0 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=1 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=2 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=3 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=4 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=5 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=6 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5415 tn=7 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=0 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=1 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=2 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=3 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=4 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=5 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=6 bl=148 pwr=0 2025-03-27 06:23:24 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=5417): ver=1 fn=5416 tn=7 bl=148 pwr=0 2025-03-27 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:23:26 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:23:26 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:23:27 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:23:27 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:23:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:27 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:23:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:23:32 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:23:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:23:33 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:23:33 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:23:33 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:23:33 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:33 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:23:33 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:33 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:33 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:33 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:33 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:33 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:23:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:23:38 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:23:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:38 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:23:39 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:23:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:23:39 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:23:39 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:23:39 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:39 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:23:44 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:23:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:23:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:23:44 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:23:44 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:23:44 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:44 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:23:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:23:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:23:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:23:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:23:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:23:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:23:49 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:23:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:23:50 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:23:50 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:23:50 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:23:50 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:23:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:23:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:23:50 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:51 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:23:51 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:23:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:52 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:23:52 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:23:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:53 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:23:53 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:23:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:23:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:23:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:23:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:23:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:23:58 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:24:03 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:24:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:24:03 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:24:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:24:03 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:24:03 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:24:03 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:24:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:24:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:24:04 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:24:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:04 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:24:05 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:05 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:24:06 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:06 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:24:07 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:24:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:07 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:24:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:24:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:24:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:24:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:24:09 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:24:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:24:10 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:24:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:24:11 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:24:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:24:17 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:24:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:24:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:24:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:24:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:24:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:24:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:24:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:24:17 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:24:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:24:18 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:24:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:21 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:24:21 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:24:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:22 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:24:22 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:24:23 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:24:23 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:24:24 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:24:24 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:24:25 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:24:25 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:25 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:24:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:24:30 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:24:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:30 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:24:31 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:24:31 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:24:31 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:24:31 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:24:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:24:31 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:24:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:24:34 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:34 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:24:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:24:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:24:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:24:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:24:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:24:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:39 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:24:44 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:24:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:24:44 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:24:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:24:44 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:24:44 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:24:44 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:24:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:24:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:24:45 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:24:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:45 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:24:46 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:24:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:46 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:24:47 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:24:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:47 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:24:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:24:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:24:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:24:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:24:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:52 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:24:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:24:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:24:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:24:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:24:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:24:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:24:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:24:57 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:24:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:24:57 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:24:58 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:24:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:24:58 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:24:58 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:24:58 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:24:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:24:58 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:59 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:24:59 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:01 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:25:01 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:25:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:25:05 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:25:05 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:25:06 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:25:06 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:25:07 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:25:07 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:25:08 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:25:08 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:25:09 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:25:10 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:25:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:25:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:25:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:25:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:25:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:25:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:25:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:25:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:25:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:25:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:25:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:25:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:25:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:19 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:25:19 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:25:20 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:25:20 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:25:20 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:25:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:25:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:25:20 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:20 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:25:21 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:21 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:25:22 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:22 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:25:23 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:23 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:25:24 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:24 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:25:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:28 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:25:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:25:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:25:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:25:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:25:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:25:33 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:25:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:25:33 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:25:33 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:25:33 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:25:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:25:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:25:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:25:34 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:25:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:35 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:25:35 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:25:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:36 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:25:36 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:37 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:25:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:25:38 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:25:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:25:39 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:25:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:25:40 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:49 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:49 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3594 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:25:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:25:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:25:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:25:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:25:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:25:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:25:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:25:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:25:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:25:54 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:25:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:25:54 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:25:55 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:25:55 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:25:55 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:25:55 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:25:55 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:25:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:25:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:25:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:25:55 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:26:00 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:26:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:26:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:26:00 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:26:00 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:26:00 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:00 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:26:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:26:05 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:26:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:05 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:26:06 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:26:06 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:26:06 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:26:06 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:26:06 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:06 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:26:06 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:06 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:06 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:06 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:06 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:06 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:26:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:26:11 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:26:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:11 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:26:12 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:26:12 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:26:12 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:26:12 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:26:12 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:12 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:26:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:26:17 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:26:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:26:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:26:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:26:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:17 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:26:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:26:22 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:26:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:22 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:26:23 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:26:23 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:26:23 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:26:23 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:23 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:26:28 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:26:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:26:28 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:26:28 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:26:28 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:26:28 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:26:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:26:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:26:29 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:29 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:26:30 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:30 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:26:31 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:31 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:26:32 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:32 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:26:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:26:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:26:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:26:33 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:26:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:26:34 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:26:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:26:35 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:26:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:26:36 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:26:37 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:26:37 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:26:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:26:38 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:26:39 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:26:39 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:26:40 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:26:40 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:26:42 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:26:42 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:26:43 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:26:43 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:26:44 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:26:44 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:26:45 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:26:45 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:26:46 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:26:46 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:26:47 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:26:47 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:26:48 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:26:48 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:26:49 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:26:49 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:26:49 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:26:50 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:26:50 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:26:51 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:26:51 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:26:54 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:26:54 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:26:55 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:26:55 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:26:56 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:26:56 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:26:57 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:26:59 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:26:59 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:27:00 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:27:01 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:27:01 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:27:02 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:27:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:02 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:27:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:27:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:27:07 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:27:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:07 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:27:07 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:27:07 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:27:07 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:27:07 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:27:07 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:27:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:08 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:08 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:27:09 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:27:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:09 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:10 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:27:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:27:15 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:27:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:27:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:27:16 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:27:16 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:27:16 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:27:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:27:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:22 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:27:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:27:27 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:27:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:27 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:27:28 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:27:28 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:27:28 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:27:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:28 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:27:28 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:27:28 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:27:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:28 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:27:29 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:27:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:29 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:34 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:27:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:27:39 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:27:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:39 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:27:39 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:27:39 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:27:39 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:27:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:39 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:27:40 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:27:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:40 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:27:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:27:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:27:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:45 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:27:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:27:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:27:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:27:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:27:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:27:50 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:27:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:27:51 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:27:51 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:27:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:51 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:52 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:27:52 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:53 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:27:53 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:53 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:27:54 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:54 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:27:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:27:55 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:27:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:27:56 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:27:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:27:57 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:27:57 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:27:58 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:27:58 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:27:59 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:27:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:27:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:27:59 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:04 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:04 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:04 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:28:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:28:04 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:04 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:04 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:05 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:28:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=0 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=1 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=2 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=3 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=4 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=5 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=6 bl=148 pwr=0 2025-03-27 06:28:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=7 bl=148 pwr=0 2025-03-27 06:28:05 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:06 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:28:07 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:07 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:28:08 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:08 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:13 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:28:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:28:14 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:14 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:14 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:19 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:19 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:28:19 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:28:19 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:19 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:19 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:20 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:25 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:25 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:25 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:28:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:28:25 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:25 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:25 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:25 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:30 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:30 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:28:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:28:31 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:31 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:31 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:28:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:28:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:28:33 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:33 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:28:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:34 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:34 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=792 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:34 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=792 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:34 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=792 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:34 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=792 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:34 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=792 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:34 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=792 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:39 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:39 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:39 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:39 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:39 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:28:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:28:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:28:40 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:28:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=0 bl=148 pwr=0 2025-03-27 06:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=1 bl=148 pwr=0 2025-03-27 06:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=2 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=3 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=4 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=5 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=6 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=7 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=0 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=1 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=2 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=3 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=4 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=5 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=6 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=7 bl=148 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=0 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=1 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=2 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=3 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=4 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=5 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=6 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=219 tn=7 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=0 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=1 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=2 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=3 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=4 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=5 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=6 pwr=0 2025-03-27 06:28:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=221): fn=220 tn=7 pwr=0 2025-03-27 06:28:40 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:28:41 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:28:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:41 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:28:42 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:42 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:43 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:28:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:43 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:28:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:28:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:28:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:28:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:28:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:28:48 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:28:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:28:49 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:28:49 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:49 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:28:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:28:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:50 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:28:50 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:50 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:28:51 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:51 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:28:52 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:52 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:28:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:28:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:28:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1474 tn=7 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=0 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=1 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=2 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=3 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=4 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=5 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=6 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1475 tn=7 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=0 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=1 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=2 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=3 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=4 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=5 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=6 pwr=0 2025-03-27 06:28:55 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=1477): fn=1476 tn=7 pwr=0 2025-03-27 06:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:28:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:28:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:28:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:28:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:28:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:28:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:28:57 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:29:02 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:29:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:29:02 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:29:02 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:29:02 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:29:02 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:29:02 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:29:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:29:03 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:03 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:29:04 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:04 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:05 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:29:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:29:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:29:08 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:29:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:29:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:29:10 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:29:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:10 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:29:10 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:10 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:10 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:10 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:10 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:10 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:29:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:29:15 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:29:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:15 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:29:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:29:16 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:29:16 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:29:16 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:29:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:29:16 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:17 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:29:17 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:18 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:29:18 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:19 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:20 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:29:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:29:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:29:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:29:23 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:29:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:29:24 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:24 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:29:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:29:29 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:29:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:29:30 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:29:30 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:30 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:29:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=0 bl=148 pwr=0 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=1 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=2 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=3 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=4 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=5 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=6 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=219 tn=7 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=0 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=1 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=2 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=3 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=4 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=5 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=6 bl=148 pwr=0 2025-03-27 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=221): ver=1 fn=220 tn=7 bl=148 pwr=0 2025-03-27 06:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:29:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:29:33 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:29:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:33 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:29:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:35 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:29:35 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1212 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:35 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1212 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:35 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1212 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:35 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1212 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:35 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1212 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:35 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:29:40 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:29:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:29:40 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:29:40 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:29:40 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:29:40 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:40 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:29:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:29:41 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:29:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:41 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:29:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:29:42 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:29:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:46 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1343 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1343 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1343 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1343 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1343 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1343 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:29:51 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:29:51 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:29:51 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:29:51 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:51 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:29:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:29:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:29:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:29:53 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:53 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:29:54 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:54 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:29:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:29:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:29:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:29:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:29:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:29:55 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:30:00 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:30:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:30:00 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:30:00 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:30:00 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:30:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:30:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:30:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:01 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:30:01 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:02 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:30:02 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:03 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:30:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:03 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:30:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:30:08 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:30:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:08 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:30:09 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:30:09 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:30:09 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:30:09 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:30:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:09 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:30:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:30:14 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:30:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:14 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:30:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:30:15 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:30:15 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:30:15 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:30:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:15 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:15 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=167 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:30:20 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:30:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:30:20 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=107 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=107 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=107 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=107 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=107 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=107 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=109 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=109 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=109 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=109 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=109 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=109 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=110 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=110 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=110 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=111 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:30:20 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=113 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=113 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=113 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=113 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=113 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:30:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:30:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=126 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=127 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=127 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=128 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=128 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=128 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=128 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=130 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=130 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=130 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=133): ver=1 fn=132 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=133): ver=1 fn=132 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=132 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=132 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=132 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=132 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=132 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=132 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=133 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=133 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=133 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=133 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=133 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=136): ver=1 fn=135 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=136): ver=1 fn=135 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=136): ver=1 fn=135 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=135 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=135 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=135 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=135 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=135 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=136 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=136 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=136 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=136 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=136 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=137 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=137 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=137 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=137 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=137 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=137 tn=7 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=0 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=1 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=2 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=3 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=4 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=5 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=6 bl=148 pwr=0 2025-03-27 06:30:20 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=140): ver=1 fn=139 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=139 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=140 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=141 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=141 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=141 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=141 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=142 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=142 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=142 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=142 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=142 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=143 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=144 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=144 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=144 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=144 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=147): ver=1 fn=146 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=147): ver=1 fn=146 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=147): ver=1 fn=146 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=146 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=146 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=146 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=146 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=146 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=149): ver=1 fn=148 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=149): ver=1 fn=148 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=148 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=148 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=148 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=148 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=148 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=148 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=149 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=149 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=149 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=149 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=152): ver=1 fn=151 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=152): ver=1 fn=151 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=151 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=151 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=151 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=151 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=151 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=151 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=152 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=155): ver=1 fn=154 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=154 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=155 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=155 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=156 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=156 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=157 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=157 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=157 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=157 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=157 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=157 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=157 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=157 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=159 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=159 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=159 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=159 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=159 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=159 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=159 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=159 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=160 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=160 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=160 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=160 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=160 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=160 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=160 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=160 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=161 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=163): ver=1 fn=162 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=162 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=163 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=164): ver=1 fn=163 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=163 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=163 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=163 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=163 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=163 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=163 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=165): ver=1 fn=164 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=166): ver=1 fn=165 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=165 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=167): ver=1 fn=166 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=166 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=168): ver=1 fn=167 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=169): ver=1 fn=167 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=169): ver=1 fn=168 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=168 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=170): ver=1 fn=169 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=169 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=171): ver=1 fn=170 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=172): ver=1 fn=171 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=171 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=172 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=172 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=173): ver=1 fn=172 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=172 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=172 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=172 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=172 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=172 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=173 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=174): ver=1 fn=173 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=173 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=173 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=173 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=173 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=173 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=173 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=175): ver=1 fn=174 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=176): ver=1 fn=174 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=176): ver=1 fn=175 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=176): ver=1 fn=175 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=175 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=175 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=175 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=175 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=175 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=175 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=177): ver=1 fn=176 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=178): ver=1 fn=177 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=178): ver=1 fn=177 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=177 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=177 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=177 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=177 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=177 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=177 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=179): ver=1 fn=178 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=178 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=180): ver=1 fn=179 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=181): ver=1 fn=180 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=182): ver=1 fn=180 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=182): ver=1 fn=181 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=182): ver=1 fn=181 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=181 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=181 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=181 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=181 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=181 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=181 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=182 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=183): ver=1 fn=182 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=182 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=182 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=182 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=182 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=182 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=182 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=184): ver=1 fn=183 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=185): ver=1 fn=183 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=185): ver=1 fn=184 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=184 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=185 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=185 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=185 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=185 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=186): ver=1 fn=185 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=185 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=185 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=185 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=187): ver=1 fn=186 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=188): ver=1 fn=187 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=188): ver=1 fn=187 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=187 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=187 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=187 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=187 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=187 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=187 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=188 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=189): ver=1 fn=188 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=188 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=188 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=188 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=188 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=188 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=188 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=190): ver=1 fn=189 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=191): ver=1 fn=190 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=191): ver=1 fn=190 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=190 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=190 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=190 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=190 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=190 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=190 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=191 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=192): ver=1 fn=191 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=191 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=191 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=191 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=191 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=191 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=191 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=193): ver=1 fn=192 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=194): ver=1 fn=193 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=194): ver=1 fn=193 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=194): ver=1 fn=193 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=194): ver=1 fn=193 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=194): ver=1 fn=193 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=194): ver=1 fn=193 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=195): ver=1 fn=193 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=195): ver=1 fn=193 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=195): ver=1 fn=194 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=194 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=195 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=196): ver=1 fn=195 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=195 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=195 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=195 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=195 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=195 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=195 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=197): ver=1 fn=196 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=198): ver=1 fn=197 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=198): ver=1 fn=197 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=197 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=197 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=197 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=197 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=197 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=197 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=198 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=198 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=198 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=198 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=198 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=198 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=198 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=198 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=200): ver=1 fn=199 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=201): ver=1 fn=200 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=201): ver=1 fn=200 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=201): ver=1 fn=200 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=200 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=200 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=200 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=200 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=200 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=201 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=202): ver=1 fn=201 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=201 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=201 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=201 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=201 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=201 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=201 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=203): ver=1 fn=202 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=204): ver=1 fn=203 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=203 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=0 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=1 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=2 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=3 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=4 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=5 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=6 bl=148 pwr=0 2025-03-27 06:30:21 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=205): ver=1 fn=204 tn=7 bl=148 pwr=0 2025-03-27 06:30:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:21 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:30:22 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:30:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:22 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:30:27 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:30:27 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:30:28 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:30:28 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:30:29 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:30:29 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:30:30 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:30:30 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:30:31 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:30:31 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:30:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:30:33 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:30:36 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:30:36 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:30:37 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:30:37 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:30:38 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:30:38 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:30:39 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:30:39 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:30:40 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:30:40 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=0 bl=148 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=1 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=2 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=3 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=4 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=5 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=6 pwr=0 2025-03-27 06:30:40 [WARNING] transceiver.py:330 (MS@172.18.161.22:6700) Stale TRXD message (fn=4442): fn=4441 tn=7 pwr=0 2025-03-27 06:30:41 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:30:41 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:30:42 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:30:42 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:42 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4880 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4880 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4880 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4880 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4880 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4880 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:42 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4881 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:30:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:30:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:30:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:30:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:30:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:30:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:30:47 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:30:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:30:47 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:30:48 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:30:48 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:30:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:30:48 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:30:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:30:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:30:48 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:49 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:30:49 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:30:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:30:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:51 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:30:51 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:30:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:30:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:30:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:30:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:30:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:30:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=0 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=1 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=2 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=3 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=4 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=5 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=6 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1964 tn=7 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=0 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=1 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=2 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=3 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=4 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=5 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=6 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1965 tn=7 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=0 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=1 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=2 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=3 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=4 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=5 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=6 bl=148 pwr=0 2025-03-27 06:30:56 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=1967): ver=1 fn=1966 tn=7 bl=148 pwr=0 2025-03-27 06:30:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:30:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:30:58 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:30:58 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:30:59 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:30:59 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:31:00 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:31:09 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:31:09 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:31:11 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:31:11 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:31:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5223 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5223 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5224 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=5225 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:31:17 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:31:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:31:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:31:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:31:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:31:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:31:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:31:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:31:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:19 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:31:19 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:20 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:31:20 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:31:20 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:21 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:31:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1000 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1000 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:31:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:31:26 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:31:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:26 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:31:27 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:31:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:31:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:31:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:27 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:27 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:31:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:31:32 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:31:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:32 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:31:32 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:31:32 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:31:32 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:32 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:31:33 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:33 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:31:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:31:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:31:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:31:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:31:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:31:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:40 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:31:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:40 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:31:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:31:45 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:31:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:45 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=108): ver=1 fn=107 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=109): ver=1 fn=108 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=110): ver=1 fn=109 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=111): ver=1 fn=110 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=112): ver=1 fn=111 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=113): ver=1 fn=112 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:31:46 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:31:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=114): ver=1 fn=113 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=115): ver=1 fn=114 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=116): ver=1 fn=115 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=117): ver=1 fn=116 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=118): ver=1 fn=117 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=120): ver=1 fn=119 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=121): ver=1 fn=120 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=122): ver=1 fn=121 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=123): ver=1 fn=122 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=124): ver=1 fn=123 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=125): ver=1 fn=124 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=126): ver=1 fn=125 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=127): ver=1 fn=126 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=128): ver=1 fn=127 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=129): ver=1 fn=128 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=130): ver=1 fn=129 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=131): ver=1 fn=130 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=132): ver=1 fn=131 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=133): ver=1 fn=132 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=133): ver=1 fn=132 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=133): ver=1 fn=132 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=133): ver=1 fn=132 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=134): ver=1 fn=133 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=135): ver=1 fn=134 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=136): ver=1 fn=135 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=137): ver=1 fn=136 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=138): ver=1 fn=137 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=139): ver=1 fn=138 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=140): ver=1 fn=139 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=140): ver=1 fn=139 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=140): ver=1 fn=139 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=141): ver=1 fn=140 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=142): ver=1 fn=141 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=143): ver=1 fn=142 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=144): ver=1 fn=143 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=145): ver=1 fn=144 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=146): ver=1 fn=145 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=147): ver=1 fn=146 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=147): ver=1 fn=146 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=147): ver=1 fn=146 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=148): ver=1 fn=147 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=149): ver=1 fn=148 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=149): ver=1 fn=148 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=149): ver=1 fn=148 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=150): ver=1 fn=149 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=151): ver=1 fn=150 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=152): ver=1 fn=151 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=152): ver=1 fn=151 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=153): ver=1 fn=152 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=154): ver=1 fn=153 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=155): ver=1 fn=154 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=155): ver=1 fn=154 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=155): ver=1 fn=154 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=155): ver=1 fn=154 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=155 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=155 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=155 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=155 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=0 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=1 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=2 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=3 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=157): ver=1 fn=156 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=157 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=157 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=158): ver=1 fn=157 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=4 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=5 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=6 bl=148 pwr=0 2025-03-27 06:31:46 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=159): ver=1 fn=158 tn=7 bl=148 pwr=0 2025-03-27 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:47 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:31:47 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:49 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:31:49 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:31:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:50 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:31:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:31:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:54 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:31:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:31:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:31:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:31:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:31:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:31:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:31:59 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:31:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:31:59 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:31:59 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:31:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:31:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:31:59 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:00 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:00 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:02 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:07 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:07 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:08 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:08 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:08 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:08 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:32:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:08 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:08 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:14 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:14 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:14 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:32:14 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:32:14 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:14 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:14 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:14 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:14 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:19 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:20 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:20 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:20 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:22 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=548 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=548 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=548 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=548 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=548 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=548 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:22 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=549 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:27 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:27 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:32:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:32:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:27 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:32:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:32:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:30 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:35 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:32:35 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:32:35 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:35 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:35 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:32:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:32:36 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:36 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:32:37 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:37 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:38 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:43 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:43 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:43 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:43 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:32:44 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:44 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:32:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:46 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:51 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:32:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:32:51 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:51 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:51 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:32:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:32:52 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:52 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:32:53 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:32:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:53 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:54 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:54 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=573 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:32:59 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:32:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:32:59 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:32:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:32:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:32:59 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:32:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:32:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:33:00 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:00 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:33:01 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:01 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:33:01 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:02 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:33:02 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:03 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:08 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:08 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:33:08 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:33:08 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:08 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:08 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:33:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:33:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:33:09 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:09 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:12 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=980 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=980 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=980 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=980 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=980 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:12 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=980 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:17 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:17 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:18 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:18 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:18 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:33:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:20 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:25 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:25 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:25 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:26 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:26 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:26 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:33:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:29 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:34 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:34 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:34 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:34 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:34 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:34 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:39 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:39 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:40 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:40 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:40 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:40 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:40 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:41 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:33:41 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:33:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:41 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:33:42 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:42 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:43 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:48 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:48 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=0 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=1 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=2 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=3 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=4 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=5 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=6 bl=148 pwr=0 2025-03-27 06:33:48 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=107): ver=1 fn=106 tn=7 bl=148 pwr=0 2025-03-27 06:33:48 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:48 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:48 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:48 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:48 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:48 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:48 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:48 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:48 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:48 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:53 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:53 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:54 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:33:54 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:33:54 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:54 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:54 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:54 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:33:59 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:33:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:33:59 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:33:59 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:33:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:33:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:33:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:33:59 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:33:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:33:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:33:59 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:04 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:04 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:05 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:05 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:10 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:10 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:10 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:10 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:11 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:11 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:11 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:16 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:16 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:16 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:16 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:16 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:16 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:16 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:34:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:34:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:18 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:34:18 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:19 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:34:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:34:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:34:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:34:19 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:34:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:20 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:34:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:34:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:34:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:21 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:21 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:26 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:26 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:27 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:27 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:27 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:27 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:27 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:34:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:27 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:27 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:32 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:32 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:32 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:32 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:32 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:32 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:32 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:34:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:33 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:38 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:38 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:38 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:38 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:38 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:38 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:38 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:43 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:43 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:44 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:44 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:44 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:44 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:34:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:44 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:44 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:49 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:49 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:49 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:49 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:49 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:49 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:49 [DEBUG] fake_trx.py:377 (BTS@172.18.161.20:5700) Recv FAKE_TRXC_DELAY cmd 2025-03-27 06:34:49 [INFO] fake_trx.py:380 (BTS@172.18.161.20:5700) Artificial TRXC delay set to 200 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD FAKE_TRXC_DELAY 2025-03-27 06:34:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:49 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=156): ver=1 fn=114 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=114 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=114 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=199): ver=1 fn=114 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=114 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=114 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=114 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=114 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=115 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=116 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=117 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=117 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=243): ver=1 fn=117 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=286): ver=1 fn=117 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=286): ver=1 fn=117 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=286): ver=1 fn=117 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:34:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=330): ver=1 fn=117 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=330): ver=1 fn=117 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=330): ver=1 fn=118 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=118 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=119 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=120 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=120 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=373): ver=1 fn=120 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=120 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=120 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=120 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=120 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=120 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=121 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=122 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=123 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=124 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=125 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=126 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=127 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=128 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=129 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=130 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=131 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=132 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=133 tn=7 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=0 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=1 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=2 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=3 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=4 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=5 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=374): ver=1 fn=134 tn=6 bl=148 pwr=0 2025-03-27 06:34:50 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -4897us; resetting the clock 2025-03-27 06:34:51 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:51 [DEBUG] fake_trx.py:377 (BTS@172.18.161.20:5700) Recv FAKE_TRXC_DELAY cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=503): ver=1 fn=462 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [INFO] fake_trx.py:380 (BTS@172.18.161.20:5700) Artificial TRXC delay set to 0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD FAKE_TRXC_DELAY 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=462 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=463 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=464 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=465 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=466 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=467 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=468 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=469 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=470 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=471 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=472 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=473 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=474 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=475 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=476 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=477 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=478 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=479 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=480 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=481 tn=7 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=0 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=1 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=2 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=3 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=4 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=5 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=504): ver=1 fn=482 tn=6 bl=148 pwr=0 2025-03-27 06:34:51 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1797us; resetting the clock 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:51 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:51 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=507 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:34:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:34:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:34:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:34:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:34:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:34:56 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:34:56 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:34:56 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:34:57 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:34:57 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:34:57 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:57 [DEBUG] fake_trx.py:377 (BTS@172.18.161.20:5700) Recv FAKE_TRXC_DELAY cmd 2025-03-27 06:34:57 [INFO] fake_trx.py:380 (BTS@172.18.161.20:5700) Artificial TRXC delay set to 200 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD FAKE_TRXC_DELAY 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6567us; resetting the clock 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=133 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=134 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=135 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=161): ver=1 fn=136 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=136 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=137 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=162): ver=1 fn=138 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:34:57 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=7 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=1 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=2 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=3 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=4 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=5 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=6 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -8204us; resetting the clock 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=249): ver=1 fn=209 tn=0 bl=148 pwr=0 2025-03-27 06:34:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=249): ver=1 fn=209 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=293): ver=1 fn=209 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=293): ver=1 fn=209 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=209 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=209 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=209 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=209 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=210 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=210 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=210 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=210 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=336): ver=1 fn=210 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=380): ver=1 fn=210 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=380): ver=1 fn=210 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=380): ver=1 fn=210 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=423): ver=1 fn=211 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=423): ver=1 fn=211 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=423): ver=1 fn=211 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] fake_trx.py:377 (BTS@172.18.161.20:5700) Recv FAKE_TRXC_DELAY cmd 2025-03-27 06:34:58 [INFO] fake_trx.py:380 (BTS@172.18.161.20:5700) Artificial TRXC delay set to 0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD FAKE_TRXC_DELAY 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=215 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=216 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=217 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=218 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=219 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=220 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=221 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=222 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=223 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=224 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=225 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=226 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=227 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=228 tn=7 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=0 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=1 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=2 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=3 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=4 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=5 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=467): ver=1 fn=229 tn=6 bl=148 pwr=0 2025-03-27 06:34:58 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1549us; resetting the clock 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:34:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:34:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:34:58 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:34:58 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:35:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:35:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:35:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:35:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:35:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:35:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:35:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:35:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:35:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:35:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:35:03 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:35:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:03 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:35:04 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:35:04 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:35:04 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:04 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:35:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:35:04 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:04 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:35:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:35:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:35:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:35:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:35:09 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:35:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:09 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:35:09 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:35:09 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:35:09 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:35:09 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:35:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:35:09 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:09 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:35:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:35:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:35:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:35:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:35:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:35:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:35:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:35:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:35:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:35:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:35:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:35:15 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:35:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:35:15 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:35:15 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:35:15 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:35:15 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:17 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:35:17 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:18 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:18 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:19 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:35:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:35:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:35:21 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:35:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:35:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:35:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:35:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:35:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:35:24 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:25 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:35:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:26 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:35:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:35:27 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:35:27 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:35:28 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:35:28 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:35:29 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:29 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:35:30 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:35:30 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:35:31 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:35:31 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:35:31 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:32 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:32 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:35:33 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:35:33 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:35:34 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:35:34 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:35:35 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:35 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:35:36 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:35:36 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:37 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:37 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:35:38 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:35:38 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:35:39 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:35:39 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:35:39 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:35:42 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:35:42 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:35:43 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:43 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:35:44 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:35:44 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:35:45 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:35:45 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:35:46 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:35:46 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:35:47 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:47 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:35:48 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:35:48 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:35:49 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:35:49 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:35:50 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:51 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:35:51 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:35:53 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:54 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:35:54 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:35:55 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:35:55 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:35:55 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:35:56 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:35:56 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:35:57 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:35:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:35:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:35:57 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:35:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=9288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=9288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=9288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=9288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=9288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:35:57 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=9288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:02 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:02 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:03 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:36:03 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:36:03 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:03 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:04 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:09 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:36:09 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:36:09 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:09 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:09 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:11 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:16 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:36:17 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:36:17 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:17 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:17 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:19 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:19 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=449 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:24 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:24 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:24 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:24 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:24 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:26 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:31 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:31 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:36:31 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:36:31 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:31 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:31 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:32 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:32 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:36:33 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:33 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:36:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:36:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:36:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:39 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:44 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:44 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:36:44 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:36:44 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:44 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:44 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:45 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:45 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:36:46 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:46 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:47 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:36:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:47 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:36:47 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:48 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:36:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:36:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:36:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:36:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:52 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:52 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:36:57 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:36:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:36:57 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:36:57 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:36:57 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:36:57 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:36:57 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:36:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:36:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:36:58 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:58 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:36:59 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:36:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:36:59 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:02 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:02 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:37:03 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:37:04 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:37:04 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:05 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:37:06 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:37:06 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:37:07 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:07 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:08 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:08 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:37:09 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:37:09 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:09 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:10 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:10 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:37:11 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:37:11 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:12 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:13 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:37:13 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:16 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:37:16 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4275 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:16 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4275 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:16 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4275 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:16 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4275 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:16 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4275 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:16 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=4275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:37:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:37:21 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:21 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:37:22 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:37:22 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:37:22 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:37:22 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:22 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:23 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:37:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:37:29 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:37:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:37:29 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:37:29 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:37:29 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:31 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:31 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:32 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:32 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:33 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:33 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:37:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:37:38 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:37:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:38 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:37:39 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:37:39 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:37:39 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=0 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=1 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=2 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=3 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=4 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=5 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=6 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=117 tn=7 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=0 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=1 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=2 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=3 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=4 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=5 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=6 bl=148 pwr=0 2025-03-27 06:37:39 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=119): ver=1 fn=118 tn=7 bl=148 pwr=0 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:40 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:37:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:37:45 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:45 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:37:46 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:46 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:37:46 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:48 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:48 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:49 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:49 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:37:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:37:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:37:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:53 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:53 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=1740 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:37:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:37:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:37:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:37:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:37:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:37:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:37:58 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:37:58 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:37:59 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:37:59 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:37:59 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=0 bl=148 pwr=0 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=1 bl=148 pwr=0 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=2 bl=148 pwr=0 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=3 bl=148 pwr=0 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=4 bl=148 pwr=0 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=5 bl=148 pwr=0 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=6 bl=148 pwr=0 2025-03-27 06:37:59 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=216): ver=1 fn=215 tn=7 bl=148 pwr=0 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:37:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:00 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:00 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:05 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:06 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:11 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:11 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:12 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:12 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:12 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:13 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:18 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:18 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:38:18 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:38:18 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:18 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:18 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:19 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:19 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:20 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:25 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:38:25 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:38:25 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:25 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:25 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:25 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:26 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:26 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:27 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:27 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:28 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:28 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:33 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:33 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:34 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:38:34 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:38:34 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:34 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:34 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:34 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:35 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:35 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:36 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:36 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:37 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:37 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=790 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:37 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:42 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:42 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:38:42 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:38:42 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:42 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:42 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:43 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:43 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:44 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:44 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:45 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:45 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:46 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:46 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:51 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:38:51 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:38:51 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:38:51 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:51 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:52 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:53 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:38:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:53 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:54 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:38:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:38:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:38:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:38:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:38:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:38:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:38:59 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:38:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:38:59 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:39:00 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:39:00 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:39:00 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:39:00 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:00 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:00 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:00 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:39:05 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:39:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:05 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:39:05 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:39:05 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:39:05 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:05 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:39:05 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:05 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:39:05 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:05 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:05 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:05 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:05 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:05 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:39:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:39:10 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:39:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:10 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:39:11 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:39:11 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:39:11 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:39:11 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:39:11 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:11 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:11 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:39:16 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:39:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:16 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:39:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:39:21 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:39:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:21 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:39:22 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:39:22 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:39:22 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:22 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:22 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:23 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:23 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:23 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:24 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:24 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:39:27 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:28 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:28 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:39:29 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:30 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:30 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:39:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:32 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:39:32 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:33 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:39:33 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:34 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:39:34 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:35 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:39:35 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:37 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:39:37 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:38 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:39:38 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:38 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3709 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3709 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3709 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3709 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=0 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=1 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=2 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=3 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=4 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:38 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=3710 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:39:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:39:43 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:39:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:43 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:39:44 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:39:44 [DEBUG] fake_trx.py:273 (BTS@172.18.161.20:5700) Recv FAKE_TOA cmd 2025-03-27 06:39:44 [DEBUG] fake_trx.py:292 (BTS@172.18.161.20:5700) Recv FAKE_RSSI cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:44 [DEBUG] fake_trx.py:317 (BTS@172.18.161.20:5700) Recv FAKE_CI cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD ECHO 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.161.22:6700) Recv POWERON CMD 2025-03-27 06:39:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.161.22:6700) Starting transceiver... 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.161.22:6700) Recv RXTUNE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.161.22:6700) Recv TXTUNE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:45 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD NOHANDOVER 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.161.22:6700) Ignore CMD SETSLOT 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.161.22:6700) Recv POWEROFF cmd 2025-03-27 06:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.161.22:6700) Stopping transceiver... 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.161.20:5700) Recv SETPOWER cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.161.20:5700/1) Recv SETPOWER cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.161.20:5700/2) Recv SETPOWER cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.161.20:5700/3) Recv SETPOWER cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:45 [INFO] transceiver.py:276 Stopping clock generator 2025-03-27 06:39:45 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:45 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:45 [WARNING] transceiver.py:287 (BTS@172.18.161.20:5700) RX TRXD message (ver=1 fn=351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping... 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.161.20:5700) Recv POWEROFF cmd 2025-03-27 06:39:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.161.20:5700) Stopping transceiver... 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.161.20:5700) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.161.20:5700) Recv SETFORMAT cmd 2025-03-27 06:39:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.161.20:5700) TRXD header version 1 -> 1 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.161.20:5700/1) Recv RXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.161.20:5700/1) Recv TXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.161.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.161.20:5700/1) Recv NOMTXPOWER cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.161.20:5700/1) Recv SETFORMAT cmd 2025-03-27 06:39:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.161.20:5700/1) TRXD header version 1 -> 1 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.161.20:5700/2) Recv RXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.161.20:5700/2) Recv TXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.161.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.161.20:5700/2) Recv NOMTXPOWER cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.161.20:5700/2) Recv SETFORMAT cmd 2025-03-27 06:39:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.161.20:5700/2) TRXD header version 1 -> 1 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.161.20:5700/3) Recv RXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.161.20:5700/3) Recv TXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.161.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1... 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.161.20:5700/3) Recv NOMTXPOWER cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.161.20:5700/3) Recv SETFORMAT cmd 2025-03-27 06:39:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.161.20:5700/3) TRXD header version 1 -> 1 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.161.20:5700) Recv RXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETTSC 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETTSC 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETTSC 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.161.20:5700) Recv TXTUNE cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETRXGAIN 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETRXGAIN 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETTSC 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETRXGAIN 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.161.20:5700) Recv NOMTXPOWER cmd 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.161.20:5700) Recv POWERON CMD 2025-03-27 06:39:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.161.20:5700) Starting transceiver... 2025-03-27 06:39:50 [INFO] transceiver.py:273 Starting clock generator 2025-03-27 06:39:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETRXGAIN 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.161.20:5700/1) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.161.20:5700/2) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.161.20:5700/3) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.161.20:5700) Ignore CMD SETSLOT 2025-03-27 06:39:50 [DEBUG] clck_gen.py:128 IND CLOCK 0 2025-03-27 06:39:50 [DEBUG] clck_gen.py:128 IND CLOCK 102 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0 2025-03-27 06:39:50 [WARNING] transceiver.py:330 (BTS@172.18.161.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0 2025-03-27 06:39:51 [DEBUG] clck_gen.py:128 IND CLOCK 204 2025-03-27 06:39:51 [DEBUG] clck_gen.py:128 IND CLOCK 306 2025-03-27 06:39:52 [DEBUG] clck_gen.py:128 IND CLOCK 408 2025-03-27 06:39:52 [DEBUG] clck_gen.py:128 IND CLOCK 510 2025-03-27 06:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 612 2025-03-27 06:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 714 2025-03-27 06:39:54 [DEBUG] clck_gen.py:128 IND CLOCK 816 2025-03-27 06:39:54 [DEBUG] clck_gen.py:128 IND CLOCK 918 2025-03-27 06:39:55 [DEBUG] clck_gen.py:128 IND CLOCK 1020 2025-03-27 06:39:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122 2025-03-27 06:39:56 [DEBUG] clck_gen.py:128 IND CLOCK 1224 2025-03-27 06:39:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326 2025-03-27 06:39:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428 2025-03-27 06:39:57 [DEBUG] clck_gen.py:128 IND CLOCK 1530 2025-03-27 06:39:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632 2025-03-27 06:39:58 [DEBUG] clck_gen.py:128 IND CLOCK 1734 2025-03-27 06:39:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836 2025-03-27 06:39:59 [DEBUG] clck_gen.py:128 IND CLOCK 1938 2025-03-27 06:39:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040 2025-03-27 06:40:00 [DEBUG] clck_gen.py:128 IND CLOCK 2142 2025-03-27 06:40:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244 2025-03-27 06:40:01 [DEBUG] clck_gen.py:128 IND CLOCK 2346 2025-03-27 06:40:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448 2025-03-27 06:40:02 [DEBUG] clck_gen.py:128 IND CLOCK 2550 2025-03-27 06:40:02 [DEBUG] clck_gen.py:128 IND CLOCK 2652 2025-03-27 06:40:03 [DEBUG] clck_gen.py:128 IND CLOCK 2754 2025-03-27 06:40:03 [DEBUG] clck_gen.py:128 IND CLOCK 2856 2025-03-27 06:40:04 [DEBUG] clck_gen.py:128 IND CLOCK 2958 2025-03-27 06:40:04 [DEBUG] clck_gen.py:128 IND CLOCK 3060 2025-03-27 06:40:04 [DEBUG] clck_gen.py:128 IND CLOCK 3162 2025-03-27 06:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 3264 2025-03-27 06:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366 2025-03-27 06:40:06 [DEBUG] clck_gen.py:128 IND CLOCK 3468 2025-03-27 06:40:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570 2025-03-27 06:40:07 [DEBUG] clck_gen.py:128 IND CLOCK 3672 2025-03-27 06:40:07 [DEBUG] clck_gen.py:128 IND CLOCK 3774 2025-03-27 06:40:08 [DEBUG] clck_gen.py:128 IND CLOCK 3876 2025-03-27 06:40:08 [DEBUG] clck_gen.py:128 IND CLOCK 3978 2025-03-27 06:40:09 [DEBUG] clck_gen.py:128 IND CLOCK 4080 2025-03-27 06:40:09 [DEBUG] clck_gen.py:128 IND CLOCK 4182 2025-03-27 06:40:10 [DEBUG] clck_gen.py:128 IND CLOCK 4284 2025-03-27 06:40:10 [DEBUG] clck_gen.py:128 IND CLOCK 4386 2025-03-27 06:40:11 [DEBUG] clck_gen.py:128 IND CLOCK 4488 2025-03-27 06:40:11 [DEBUG] clck_gen.py:128 IND CLOCK 4590 2025-03-27 06:40:12 [DEBUG] clck_gen.py:128 IND CLOCK 4692 2025-03-27 06:40:12 [DEBUG] clck_gen.py:128 IND CLOCK 4794 2025-03-27 06:40:12 [DEBUG] clck_gen.py:128 IND CLOCK 4896 2025-03-27 06:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 4998 2025-03-27 06:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 5100 2025-03-27 06:40:14 [DEBUG] clck_gen.py:128 IND CLOCK 5202 2025-03-27 06:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.161.20:5700/3) Recv RFMUTE cmd 2025-03-27 06:40:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.161.20:5700) Recv RFMUTE cmd 2025-03-27 06:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.161.20:5700/1) Recv RFMUTE cmd 2025-03-27 06:40:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.161.20:5700/2) Recv RFMUTE cmd 2025-03-27 06:40:14 [DEBUG] clck_gen.py:128 IND CLOCK 5304 2025-03-27 06:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 5406 2025-03-27 06:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 5508 2025-03-27 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 5610 2025-03-27 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 5712 2025-03-27 06:40:17 [DEBUG] clck_gen.py:128 IND CLOCK 5814 2025-03-27 06:40:17 [DEBUG] clck_gen.py:128 IND CLOCK 5916 2025-03-27 06:40:18 [DEBUG] clck_gen.py:128 IND CLOCK 6018 2025-03-27 06:40:18 [DEBUG] clck_gen.py:128 IND CLOCK 6120 2025-03-27 06:40:19 [DEBUG] clck_gen.py:128 IND CLOCK 6222 2025-03-27 06:40:19 [DEBUG] clck_gen.py:128 IND CLOCK 6324 2025-03-27 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 6426 2025-03-27 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 6528 2025-03-27 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 6630 2025-03-27 06:40:21 [DEBUG] clck_gen.py:128 IND CLOCK 6732 2025-03-27 06:40:21 [DEBUG] clck_gen.py:128 IND CLOCK 6834 2025-03-27 06:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 6936 2025-03-27 06:40:22 [DEBUG] clck_gen.py:128 IND CLOCK 7038 2025-03-27 06:40:23 [DEBUG] clck_gen.py:128 IND CLOCK 7140 2025-03-27 06:40:23 [DEBUG] clck_gen.py:128 IND CLOCK 7242 2025-03-27 06:40:24 [DEBUG] clck_gen.py:128 IND CLOCK 7344 2025-03-27 06:40:24 [DEBUG] clck_gen.py:128 IND CLOCK 7446 2025-03-27 06:40:25 [DEBUG] clck_gen.py:128 IND CLOCK 7548 2025-03-27 06:40:25 [DEBUG] clck_gen.py:128 IND CLOCK 7650 2025-03-27 06:40:26 [DEBUG] clck_gen.py:128 IND CLOCK 7752 2025-03-27 06:40:26 [DEBUG] clck_gen.py:128 IND CLOCK 7854 2025-03-27 06:40:27 [DEBUG] clck_gen.py:128 IND CLOCK 7956 2025-03-27 06:40:27 [DEBUG] clck_gen.py:128 IND CLOCK 8058 2025-03-27 06:40:28 [DEBUG] clck_gen.py:128 IND CLOCK 8160 2025-03-27 06:40:28 [DEBUG] clck_gen.py:128 IND CLOCK 8262 2025-03-27 06:40:28 [DEBUG] clck_gen.py:128 IND CLOCK 8364 2025-03-27 06:40:29 [DEBUG] clck_gen.py:128 IND CLOCK 8466 2025-03-27 06:40:29 [DEBUG] clck_gen.py:128 IND CLOCK 8568 2025-03-27 06:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 8670 2025-03-27 06:40:30 [DEBUG] clck_gen.py:128 IND CLOCK 8772 2025-03-27 06:40:31 [DEBUG] clck_gen.py:128 IND CLOCK 8874 2025-03-27 06:40:31 [DEBUG] clck_gen.py:128 IND CLOCK 8976 2025-03-27 06:40:32 [DEBUG] clck_gen.py:128 IND CLOCK 9078 2025-03-27 06:40:32 [DEBUG] clck_gen.py:128 IND CLOCK 9180 2025-03-27 06:40:33 [DEBUG] clck_gen.py:128 IND CLOCK 9282 2025-03-27 06:40:33 [DEBUG] clck_gen.py:128 IND CLOCK 9384 2025-03-27 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 9486 2025-03-27 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 9588 2025-03-27 06:40:35 [DEBUG] clck_gen.py:128 IND CLOCK 9690 2025-03-27 06:40:35 [DEBUG] clck_gen.py:128 IND CLOCK 9792 2025-03-27 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 9894 2025-03-27 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 9996 2025-03-27 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 10098 2025-03-27 06:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 10200 2025-03-27 06:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 10302 2025-03-27 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 10404 2025-03-27 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 10506 2025-03-27 06:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 10608 2025-03-27 06:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 10710 2025-03-27 06:40:40 [DEBUG] clck_gen.py:128 IND CLOCK 10812 2025-03-27 06:40:40 [DEBUG] clck_gen.py:128 IND CLOCK 10914 2025-03-27 06:40:41 [DEBUG] clck_gen.py:128 IND CLOCK 11016 2025-03-27 06:40:41 [DEBUG] clck_gen.py:128 IND CLOCK 11118 2025-03-27 06:40:42 [DEBUG] clck_gen.py:128 IND CLOCK 11220 2025-03-27 06:40:42 [DEBUG] clck_gen.py:128 IND CLOCK 11322 2025-03-27 06:40:43 [DEBUG] clck_gen.py:128 IND CLOCK 11424 2025-03-27 06:40:43 [DEBUG] clck_gen.py:128 IND CLOCK 11526 2025-03-27 06:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 11628 2025-03-27 06:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 11730 2025-03-27 06:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 11832 2025-03-27 06:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 11934 2025-03-27 06:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 12036 2025-03-27 06:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 12138 2025-03-27 06:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 12240 2025-03-27 06:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 12342 2025-03-27 06:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 12444 2025-03-27 06:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 12546 2025-03-27 06:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 12648 2025-03-27 06:40:49 [DEBUG] clck_gen.py:128 IND CLOCK 12750 2025-03-27 06:40:49 [DEBUG] clck_gen.py:128 IND CLOCK 12852 2025-03-27 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 12954 2025-03-27 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 13056 2025-03-27 06:40:51 [DEBUG] clck_gen.py:128 IND CLOCK 13158 2025-03-27 06:40:51 [DEBUG] clck_gen.py:128 IND CLOCK 13260 2025-03-27 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 13362 2025-03-27 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 13464 2025-03-27 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 13566 2025-03-27 06:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 13668 2025-03-27 06:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 13770 2025-03-27 06:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 13872 2025-03-27 06:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 13974 2025-03-27 06:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 14076 2025-03-27 06:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 14178 2025-03-27 06:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 14280 2025-03-27 06:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 14382 2025-03-27 06:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 14484 2025-03-27 06:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 14586 2025-03-27 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 14688 2025-03-27 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 14790 2025-03-27 06:40:59 [DEBUG] clck_gen.py:128 IND CLOCK 14892 2025-03-27 06:40:59 [DEBUG] clck_gen.py:128 IND CLOCK 14994 2025-03-27 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 15096 2025-03-27 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 15198 2025-03-27 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 15300 2025-03-27 06:41:01 [DEBUG] clck_gen.py:128 IND CLOCK 15402 2025-03-27 06:41:01 [DEBUG] clck_gen.py:128 IND CLOCK 15504 2025-03-27 06:41:02 [DEBUG] clck_gen.py:128 IND CLOCK 15606 2025-03-27 06:41:02 [DEBUG] clck_gen.py:128 IND CLOCK 15708 2025-03-27 06:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 15810 2025-03-27 06:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 15912 2025-03-27 06:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 16014 2025-03-27 06:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 16116 2025-03-27 06:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 16218 2025-03-27 06:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 16320 2025-03-27 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 16422 2025-03-27 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 16524 2025-03-27 06:41:07 [DEBUG] clck_gen.py:128 IND CLOCK 16626 2025-03-27 06:41:07 [DEBUG] clck_gen.py:128 IND CLOCK 16728 2025-03-27 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 16830 2025-03-27 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 16932 2025-03-27 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 17034 2025-03-27 06:41:09 [DEBUG] clck_gen.py:128 IND CLOCK 17136 2025-03-27 06:41:09 [DEBUG] clck_gen.py:128 IND CLOCK 17238 2025-03-27 06:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 17340 2025-03-27 06:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 17442 2025-03-27 06:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 17544 2025-03-27 06:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 17646 2025-03-27 06:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 17748 2025-03-27 06:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 17850 2025-03-27 06:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 17952 2025-03-27 06:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 18054 2025-03-27 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 18156 2025-03-27 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 18258 2025-03-27 06:41:15 [DEBUG] clck_gen.py:128 IND CLOCK 18360 2025-03-27 06:41:15 [DEBUG] clck_gen.py:128 IND CLOCK 18462 2025-03-27 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 18564 2025-03-27 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 18666 2025-03-27 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 18768 2025-03-27 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 18870 2025-03-27 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 18972 2025-03-27 06:41:18 [DEBUG] clck_gen.py:128 IND CLOCK 19074 2025-03-27 06:41:18 [DEBUG] clck_gen.py:128 IND CLOCK 19176 2025-03-27 06:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 19278 2025-03-27 06:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 19380 2025-03-27 06:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 19482 2025-03-27 06:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 19584 2025-03-27 06:41:21 [DEBUG] clck_gen.py:128 IND CLOCK 19686 2025-03-27 06:41:21 [DEBUG] clck_gen.py:128 IND CLOCK 19788 2025-03-27 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 19890 2025-03-27 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 19992 2025-03-27 06:41:23 [DEBUG] clck_gen.py:128 IND CLOCK 20094 2025-03-27 06:41:23 [DEBUG] clck_gen.py:128 IND CLOCK 20196 2025-03-27 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 20298 2025-03-27 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 20400 2025-03-27 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 20502 2025-03-27 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 20604 2025-03-27 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 20706 2025-03-27 06:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 20808 2025-03-27 06:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 20910 2025-03-27 06:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 21012 2025-03-27 06:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 21114 2025-03-27 06:41:28 [DEBUG] clck_gen.py:128 IND CLOCK 21216 2025-03-27 06:41:28 [DEBUG] clck_gen.py:128 IND CLOCK 21318 2025-03-27 06:41:29 [DEBUG] clck_gen.py:128 IND CLOCK 21420 2025-03-27 06:41:29 [DEBUG] clck_gen.py:128 IND CLOCK 21522 2025-03-27 06:41:30 [DEBUG] clck_gen.py:128 IND CLOCK 21624 2025-03-27 06:41:30 [DEBUG] clck_gen.py:128 IND CLOCK 21726 2025-03-27 06:41:31 [DEBUG] clck_gen.py:128 IND CLOCK 21828 2025-03-27 06:41:31 [DEBUG] clck_gen.py:128 IND CLOCK 21930 2025-03-27 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 22032 2025-03-27 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 22134 2025-03-27 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 22236 2025-03-27 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 22338 2025-03-27 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 22440 2025-03-27 06:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 22542 2025-03-27 06:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 22644 2025-03-27 06:41:35 [DEBUG] clck_gen.py:128 IND CLOCK 22746 2025-03-27 06:41:35 [DEBUG] clck_gen.py:128 IND CLOCK 22848 2025-03-27 06:41:36 [DEBUG] clck_gen.py:128 IND CLOCK 22950 2025-03-27 06:41:36 [DEBUG] clck_gen.py:128 IND CLOCK 23052 2025-03-27 06:41:37 [DEBUG] clck_gen.py:128 IND CLOCK 23154 2025-03-27 06:41:37 [DEBUG] clck_gen.py:128 IND CLOCK 23256 2025-03-27 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 23358 2025-03-27 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 23460 2025-03-27 06:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 23562 2025-03-27 06:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 23664 2025-03-27 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 23766 2025-03-27 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 23868 2025-03-27 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 23970 2025-03-27 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 24072 2025-03-27 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 24174 2025-03-27 06:41:42 [DEBUG] clck_gen.py:128 IND CLOCK 24276 2025-03-27 06:41:42 [DEBUG] clck_gen.py:128 IND CLOCK 24378 2025-03-27 06:41:43 [DEBUG] clck_gen.py:128 IND CLOCK 24480 2025-03-27 06:41:43 [DEBUG] clck_gen.py:128 IND CLOCK 24582 2025-03-27 06:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 24684 2025-03-27 06:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 24786 2025-03-27 06:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 24888 2025-03-27 06:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 24990 2025-03-27 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 25092 2025-03-27 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 25194 2025-03-27 06:41:47 [DEBUG] clck_gen.py:128 IND CLOCK 25296 2025-03-27 06:41:47 [DEBUG] clck_gen.py:128 IND CLOCK 25398 2025-03-27 06:41:48 [DEBUG] clck_gen.py:128 IND CLOCK 25500 2025-03-27 06:41:48 [DEBUG] clck_gen.py:128 IND CLOCK 25602 2025-03-27 06:41:49 [DEBUG] clck_gen.py:128 IND CLOCK 25704 2025-03-27 06:41:49 [DEBUG] clck_gen.py:128 IND CLOCK 25806 2025-03-27 06:41:49 [DEBUG] clck_gen.py:128 IND CLOCK 25908 2025-03-27 06:41:50 [DEBUG] clck_gen.py:128 IND CLOCK 26010 2025-03-27 06:41:50 [DEBUG] clck_gen.py:128 IND CLOCK 26112 2025-03-27 06:41:51 [DEBUG] clck_gen.py:128 IND CLOCK 26214 2025-03-27 06:41:51 [DEBUG] clck_gen.py:128 IND CLOCK 26316 2025-03-27 06:41:52 [DEBUG] clck_gen.py:128 IND CLOCK 26418 2025-03-27 06:41:52 [DEBUG] clck_gen.py:128 IND CLOCK 26520 2025-03-27 06:41:53 [DEBUG] clck_gen.py:128 IND CLOCK 26622 2025-03-27 06:41:53 [DEBUG] clck_gen.py:128 IND CLOCK 26724 2025-03-27 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 26826 2025-03-27 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 26928 2025-03-27 06:41:55 [DEBUG] clck_gen.py:128 IND CLOCK 27030 2025-03-27 06:41:55 [DEBUG] clck_gen.py:128 IND CLOCK 27132 2025-03-27 06:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 27234 2025-03-27 06:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 27336 2025-03-27 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 27438 2025-03-27 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 27540 2025-03-27 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 27642 2025-03-27 06:41:58 [DEBUG] clck_gen.py:128 IND CLOCK 27744 2025-03-27 06:41:58 [DEBUG] clck_gen.py:128 IND CLOCK 27846 2025-03-27 06:41:59 [DEBUG] clck_gen.py:128 IND CLOCK 27948 2025-03-27 06:41:59 [DEBUG] clck_gen.py:128 IND CLOCK 28050 2025-03-27 06:42:00 [DEBUG] clck_gen.py:128 IND CLOCK 28152 2025-03-27 06:42:00 [DEBUG] clck_gen.py:128 IND CLOCK 28254 2025-03-27 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 28356 2025-03-27 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 28458 2025-03-27 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 28560 2025-03-27 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 28662 2025-03-27 06:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 28764 2025-03-27 06:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 28866 2025-03-27 06:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 28968 2025-03-27 06:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 29070 2025-03-27 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 29172 2025-03-27 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 29274 2025-03-27 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 29376 2025-03-27 06:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 29478 2025-03-27 06:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 29580 2025-03-27 06:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 29682 2025-03-27 06:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 29784 2025-03-27 06:42:08 [DEBUG] clck_gen.py:128 IND CLOCK 29886 2025-03-27 06:42:08 [DEBUG] clck_gen.py:128 IND CLOCK 29988 2025-03-27 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 30090 2025-03-27 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 30192 2025-03-27 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 30294 2025-03-27 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 30396 2025-03-27 06:42:11 [DEBUG] clck_gen.py:128 IND CLOCK 30498 2025-03-27 06:42:11 [DEBUG] clck_gen.py:128 IND CLOCK 30600 2025-03-27 06:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 30702 2025-03-27 06:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 30804 2025-03-27 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 30906 2025-03-27 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 31008 2025-03-27 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 31110 2025-03-27 06:42:14 [DEBUG] clck_gen.py:128 IND CLOCK 31212 2025-03-27 06:42:14 [DEBUG] clck_gen.py:128 IND CLOCK 31314 2025-03-27 06:42:15 [DEBUG] clck_gen.py:128 IND CLOCK 31416 2025-03-27 06:42:15 [DEBUG] clck_gen.py:128 IND CLOCK 31518 2025-03-27 06:42:16 [DEBUG] clck_gen.py:128 IND CLOCK 31620 2025-03-27 06:42:16 [DEBUG] clck_gen.py:128 IND CLOCK 31722 2025-03-27 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 31824 2025-03-27 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 31926 2025-03-27 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 32028 2025-03-27 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 32130 2025-03-27 06:42:19 [DEBUG] clck_gen.py:128 IND CLOCK 32232 2025-03-27 06:42:19 [DEBUG] clck_gen.py:128 IND CLOCK 32334 2025-03-27 06:42:20 [DEBUG] clck_gen.py:128 IND CLOCK 32436 2025-03-27 06:42:20 [DEBUG] clck_gen.py:128 IND CLOCK 32538 2025-03-27 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 32640 2025-03-27 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 32742 2025-03-27 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 32844 2025-03-27 06:42:22 [DEBUG] clck_gen.py:128 IND CLOCK 32946 2025-03-27 06:42:22 [DEBUG] clck_gen.py:128 IND CLOCK 33048 2025-03-27 06:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 33150 2025-03-27 06:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 33252 2025-03-27 06:42:24 [DEBUG] clck_gen.py:128 IND CLOCK 33354 2025-03-27 06:42:24 [DEBUG] clck_gen.py:128 IND CLOCK 33456 2025-03-27 06:42:25 [DEBUG] clck_gen.py:128 IND CLOCK 33558 2025-03-27 06:42:25 [DEBUG] clck_gen.py:128 IND CLOCK 33660 2025-03-27 06:42:26 [DEBUG] clck_gen.py:128 IND CLOCK 33762 2025-03-27 06:42:26 [DEBUG] clck_gen.py:128 IND CLOCK 33864 2025-03-27 06:42:27 [DEBUG] clck_gen.py:128 IND CLOCK 33966 2025-03-27 06:42:27 [DEBUG] clck_gen.py:128 IND CLOCK 34068 2025-03-27 06:42:28 [DEBUG] clck_gen.py:128 IND CLOCK 34170 2025-03-27 06:42:28 [DEBUG] clck_gen.py:128 IND CLOCK 34272 2025-03-27 06:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 34374 2025-03-27 06:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 34476 2025-03-27 06:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 34578 2025-03-27 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 34680 2025-03-27 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 34782 2025-03-27 06:42:31 [DEBUG] clck_gen.py:128 IND CLOCK 34884 2025-03-27 06:42:31 [DEBUG] clck_gen.py:128 IND CLOCK 34986 2025-03-27 06:42:32 [DEBUG] clck_gen.py:128 IND CLOCK 35088 2025-03-27 06:42:32 [DEBUG] clck_gen.py:128 IND CLOCK 35190 2025-03-27 06:42:33 [DEBUG] clck_gen.py:128 IND CLOCK 35292 2025-03-27 06:42:33 [DEBUG] clck_gen.py:128 IND CLOCK 35394 2025-03-27 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 35496 2025-03-27 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 35598 2025-03-27 06:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 35700 2025-03-27 06:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 35802 2025-03-27 06:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 35904 2025-03-27 06:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 36006 2025-03-27 06:42:37 [DEBUG] clck_gen.py:128 IND CLOCK 36108 2025-03-27 06:42:37 [DEBUG] clck_gen.py:128 IND CLOCK 36210 2025-03-27 06:42:37 [DEBUG] clck_gen.py:128 IND CLOCK 36312 2025-03-27 06:42:38 [DEBUG] clck_gen.py:128 IND CLOCK 36414 2025-03-27 06:42:38 [DEBUG] clck_gen.py:128 IND CLOCK 36516 2025-03-27 06:42:39 [DEBUG] clck_gen.py:128 IND CLOCK 36618 2025-03-27 06:42:39 [DEBUG] clck_gen.py:128 IND CLOCK 36720 2025-03-27 06:42:40 [DEBUG] clck_gen.py:128 IND CLOCK 36822 2025-03-27 06:42:40 [DEBUG] clck_gen.py:128 IND CLOCK 36924 2025-03-27 06:42:41 [DEBUG] clck_gen.py:128 IND CLOCK 37026 2025-03-27 06:42:41 [DEBUG] clck_gen.py:128 IND CLOCK 37128 2025-03-27 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 37230 2025-03-27 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 37332 2025-03-27 06:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 37434 2025-03-27 06:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 37536 2025-03-27 06:42:44 [DEBUG] clck_gen.py:128 IND CLOCK 37638 2025-03-27 06:42:44 [DEBUG] clck_gen.py:128 IND CLOCK 37740 2025-03-27 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 37842 2025-03-27 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 37944 2025-03-27 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 38046 2025-03-27 06:42:46 [DEBUG] clck_gen.py:128 IND CLOCK 38148 2025-03-27 06:42:46 [DEBUG] clck_gen.py:128 IND CLOCK 38250 2025-03-27 06:42:47 [DEBUG] clck_gen.py:128 IND CLOCK 38352 2025-03-27 06:42:47 [DEBUG] clck_gen.py:128 IND CLOCK 38454 2025-03-27 06:42:48 [DEBUG] clck_gen.py:128 IND CLOCK 38556 2025-03-27 06:42:48 [DEBUG] clck_gen.py:128 IND CLOCK 38658 2025-03-27 06:42:49 [DEBUG] clck_gen.py:128 IND CLOCK 38760 2025-03-27 06:42:49 [DEBUG] clck_gen.py:128 IND CLOCK 38862 2025-03-27 06:42:50 [DEBUG] clck_gen.py:128 IND CLOCK 38964 2025-03-27 06:42:50 [DEBUG] clck_gen.py:128 IND CLOCK 39066 2025-03-27 06:42:51 [DEBUG] clck_gen.py:128 IND CLOCK 39168 2025-03-27 06:42:51 [DEBUG] clck_gen.py:128 IND CLOCK 39270 2025-03-27 06:42:52 [DEBUG] clck_gen.py:128 IND CLOCK 39372 2025-03-27 06:42:52 [DEBUG] clck_gen.py:128 IND CLOCK 39474 2025-03-27 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 39576 2025-03-27 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 39678 2025-03-27 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 39780 2025-03-27 06:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 39882 2025-03-27 06:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 39984 2025-03-27 06:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 40086 2025-03-27 06:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 40188 2025-03-27 06:42:56 [DEBUG] clck_gen.py:128 IND CLOCK 40290 2025-03-27 06:42:56 [DEBUG] clck_gen.py:128 IND CLOCK 40392 2025-03-27 06:42:57 [DEBUG] clck_gen.py:128 IND CLOCK 40494 2025-03-27 06:42:57 [DEBUG] clck_gen.py:128 IND CLOCK 40596 2025-03-27 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 40698 2025-03-27 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 40800 2025-03-27 06:42:59 [DEBUG] clck_gen.py:128 IND CLOCK 40902 2025-03-27 06:42:59 [DEBUG] clck_gen.py:128 IND CLOCK 41004 2025-03-27 06:43:00 [DEBUG] clck_gen.py:128 IND CLOCK 41106 2025-03-27 06:43:00 [DEBUG] clck_gen.py:128 IND CLOCK 41208 2025-03-27 06:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 41310 2025-03-27 06:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 41412 2025-03-27 06:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 41514 2025-03-27 06:43:02 [DEBUG] clck_gen.py:128 IND CLOCK 41616 2025-03-27 06:43:02 [DEBUG] clck_gen.py:128 IND CLOCK 41718 2025-03-27 06:43:03 [DEBUG] clck_gen.py:128 IND CLOCK 41820 2025-03-27 06:43:03 [DEBUG] clck_gen.py:128 IND CLOCK 41922 2025-03-27 06:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 42024 2025-03-27 06:43:04 [DEBUG] clck_gen.py:128 IND CLOCK 42126 2025-03-27 06:43:05 [DEBUG] clck_gen.py:128 IND CLOCK 42228 2025-03-27 06:43:05 [DEBUG] clck_gen.py:128 IND CLOCK 42330 2025-03-27 06:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 42432 2025-03-27 06:43:06 [DEBUG] clck_gen.py:128 IND CLOCK 42534 2025-03-27 06:43:07 [DEBUG] clck_gen.py:128 IND CLOCK 42636 2025-03-27 06:43:07 [DEBUG] clck_gen.py:128 IND CLOCK 42738 2025-03-27 06:43:08 [DEBUG] clck_gen.py:128 IND CLOCK 42840 2025-03-27 06:43:08 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1387us; resetting the clock 2025-03-27 06:43:08 [DEBUG] clck_gen.py:128 IND CLOCK 42942 2025-03-27 06:43:09 [DEBUG] clck_gen.py:128 IND CLOCK 43044 2025-03-27 06:43:09 [DEBUG] clck_gen.py:128 IND CLOCK 43146 2025-03-27 06:43:09 [DEBUG] clck_gen.py:128 IND CLOCK 43248 2025-03-27 06:43:10 [DEBUG] clck_gen.py:128 IND CLOCK 43350 2025-03-27 06:43:10 [DEBUG] clck_gen.py:128 IND CLOCK 43452 2025-03-27 06:43:11 [DEBUG] clck_gen.py:128 IND CLOCK 43554 2025-03-27 06:43:11 [DEBUG] clck_gen.py:128 IND CLOCK 43656 2025-03-27 06:43:12 [DEBUG] clck_gen.py:128 IND CLOCK 43758 2025-03-27 06:43:12 [DEBUG] clck_gen.py:128 IND CLOCK 43860 2025-03-27 06:43:13 [DEBUG] clck_gen.py:128 IND CLOCK 43962 2025-03-27 06:43:13 [DEBUG] clck_gen.py:128 IND CLOCK 44064 2025-03-27 06:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 44166 2025-03-27 06:43:14 [DEBUG] clck_gen.py:128 IND CLOCK 44268 2025-03-27 06:43:15 [DEBUG] clck_gen.py:128 IND CLOCK 44370 2025-03-27 06:43:15 [DEBUG] clck_gen.py:128 IND CLOCK 44472 2025-03-27 06:43:16 [DEBUG] clck_gen.py:128 IND CLOCK 44574 2025-03-27 06:43:16 [DEBUG] clck_gen.py:128 IND CLOCK 44676 2025-03-27 06:43:17 [DEBUG] clck_gen.py:128 IND CLOCK 44778 2025-03-27 06:43:17 [DEBUG] clck_gen.py:128 IND CLOCK 44880 2025-03-27 06:43:17 [DEBUG] clck_gen.py:128 IND CLOCK 44982 2025-03-27 06:43:18 [DEBUG] clck_gen.py:128 IND CLOCK 45084 2025-03-27 06:43:18 [DEBUG] clck_gen.py:128 IND CLOCK 45186 2025-03-27 06:43:19 [DEBUG] clck_gen.py:128 IND CLOCK 45288 2025-03-27 06:43:19 [DEBUG] clck_gen.py:128 IND CLOCK 45390 2025-03-27 06:43:20 [DEBUG] clck_gen.py:128 IND CLOCK 45492 2025-03-27 06:43:20 [DEBUG] clck_gen.py:128 IND CLOCK 45594 2025-03-27 06:43:21 [DEBUG] clck_gen.py:128 IND CLOCK 45696 2025-03-27 06:43:21 [DEBUG] clck_gen.py:128 IND CLOCK 45798 2025-03-27 06:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 45900 2025-03-27 06:43:22 [DEBUG] clck_gen.py:128 IND CLOCK 46002 2025-03-27 06:43:23 [DEBUG] clck_gen.py:128 IND CLOCK 46104 2025-03-27 06:43:23 [DEBUG] clck_gen.py:128 IND CLOCK 46206 2025-03-27 06:43:24 [DEBUG] clck_gen.py:128 IND CLOCK 46308 2025-03-27 06:43:24 [DEBUG] clck_gen.py:128 IND CLOCK 46410 2025-03-27 06:43:25 [DEBUG] clck_gen.py:128 IND CLOCK 46512 2025-03-27 06:43:25 [DEBUG] clck_gen.py:128 IND CLOCK 46614 2025-03-27 06:43:25 [DEBUG] clck_gen.py:128 IND CLOCK 46716 2025-03-27 06:43:26 [DEBUG] clck_gen.py:128 IND CLOCK 46818 2025-03-27 06:43:26 [DEBUG] clck_gen.py:128 IND CLOCK 46920 2025-03-27 06:43:27 [DEBUG] clck_gen.py:128 IND CLOCK 47022 2025-03-27 06:43:27 [DEBUG] clck_gen.py:128 IND CLOCK 47124 2025-03-27 06:43:28 [DEBUG] clck_gen.py:128 IND CLOCK 47226 2025-03-27 06:43:28 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1894us; resetting the clock 2025-03-27 06:43:28 [DEBUG] clck_gen.py:128 IND CLOCK 47328 2025-03-27 06:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 47430 2025-03-27 06:43:29 [DEBUG] clck_gen.py:128 IND CLOCK 47532 2025-03-27 06:43:30 [DEBUG] clck_gen.py:128 IND CLOCK 47634 2025-03-27 06:43:30 [DEBUG] clck_gen.py:128 IND CLOCK 47736 2025-03-27 06:43:31 [DEBUG] clck_gen.py:128 IND CLOCK 47838 2025-03-27 06:43:31 [DEBUG] clck_gen.py:128 IND CLOCK 47940 2025-03-27 06:43:32 [DEBUG] clck_gen.py:128 IND CLOCK 48042 2025-03-27 06:43:32 [DEBUG] clck_gen.py:128 IND CLOCK 48144 2025-03-27 06:43:33 [DEBUG] clck_gen.py:128 IND CLOCK 48246 2025-03-27 06:43:33 [DEBUG] clck_gen.py:128 IND CLOCK 48348 2025-03-27 06:43:33 [DEBUG] clck_gen.py:128 IND CLOCK 48450 2025-03-27 06:43:34 [DEBUG] clck_gen.py:128 IND CLOCK 48552 2025-03-27 06:43:34 [DEBUG] clck_gen.py:128 IND CLOCK 48654 2025-03-27 06:43:35 [DEBUG] clck_gen.py:128 IND CLOCK 48756 2025-03-27 06:43:35 [DEBUG] clck_gen.py:128 IND CLOCK 48858 2025-03-27 06:43:36 [DEBUG] clck_gen.py:128 IND CLOCK 48960 2025-03-27 06:43:36 [DEBUG] clck_gen.py:128 IND CLOCK 49062 2025-03-27 06:43:37 [DEBUG] clck_gen.py:128 IND CLOCK 49164 2025-03-27 06:43:37 [DEBUG] clck_gen.py:128 IND CLOCK 49266 2025-03-27 06:43:38 [DEBUG] clck_gen.py:128 IND CLOCK 49368 2025-03-27 06:43:38 [DEBUG] clck_gen.py:128 IND CLOCK 49470 2025-03-27 06:43:39 [DEBUG] clck_gen.py:128 IND CLOCK 49572 2025-03-27 06:43:39 [DEBUG] clck_gen.py:128 IND CLOCK 49674 2025-03-27 06:43:40 [DEBUG] clck_gen.py:128 IND CLOCK 49776 2025-03-27 06:43:40 [DEBUG] clck_gen.py:128 IND CLOCK 49878 2025-03-27 06:43:41 [DEBUG] clck_gen.py:128 IND CLOCK 49980 2025-03-27 06:43:41 [DEBUG] clck_gen.py:128 IND CLOCK 50082 2025-03-27 06:43:41 [DEBUG] clck_gen.py:128 IND CLOCK 50184 2025-03-27 06:43:42 [DEBUG] clck_gen.py:128 IND CLOCK 50286 2025-03-27 06:43:42 [DEBUG] clck_gen.py:128 IND CLOCK 50388 2025-03-27 06:43:43 [DEBUG] clck_gen.py:128 IND CLOCK 50490 2025-03-27 06:43:43 [DEBUG] clck_gen.py:128 IND CLOCK 50592 2025-03-27 06:43:44 [DEBUG] clck_gen.py:128 IND CLOCK 50694 2025-03-27 06:43:44 [DEBUG] clck_gen.py:128 IND CLOCK 50796 2025-03-27 06:43:45 [DEBUG] clck_gen.py:128 IND CLOCK 50898 2025-03-27 06:43:45 [DEBUG] clck_gen.py:128 IND CLOCK 51000 2025-03-27 06:43:46 [DEBUG] clck_gen.py:128 IND CLOCK 51102 2025-03-27 06:43:46 [DEBUG] clck_gen.py:128 IND CLOCK 51204 2025-03-27 06:43:47 [DEBUG] clck_gen.py:128 IND CLOCK 51306 2025-03-27 06:43:47 [DEBUG] clck_gen.py:128 IND CLOCK 51408 2025-03-27 06:43:48 [DEBUG] clck_gen.py:128 IND CLOCK 51510 2025-03-27 06:43:48 [DEBUG] clck_gen.py:128 IND CLOCK 51612 2025-03-27 06:43:49 [DEBUG] clck_gen.py:128 IND CLOCK 51714 2025-03-27 06:43:49 [DEBUG] clck_gen.py:128 IND CLOCK 51816 2025-03-27 06:43:49 [DEBUG] clck_gen.py:128 IND CLOCK 51918 2025-03-27 06:43:50 [DEBUG] clck_gen.py:128 IND CLOCK 52020 2025-03-27 06:43:50 [DEBUG] clck_gen.py:128 IND CLOCK 52122 2025-03-27 06:43:51 [DEBUG] clck_gen.py:128 IND CLOCK 52224 2025-03-27 06:43:51 [DEBUG] clck_gen.py:128 IND CLOCK 52326 2025-03-27 06:43:52 [DEBUG] clck_gen.py:128 IND CLOCK 52428 2025-03-27 06:43:52 [DEBUG] clck_gen.py:128 IND CLOCK 52530 2025-03-27 06:43:53 [DEBUG] clck_gen.py:128 IND CLOCK 52632 2025-03-27 06:43:53 [DEBUG] clck_gen.py:128 IND CLOCK 52734 2025-03-27 06:43:54 [DEBUG] clck_gen.py:128 IND CLOCK 52836 2025-03-27 06:43:54 [DEBUG] clck_gen.py:128 IND CLOCK 52938 2025-03-27 06:43:55 [DEBUG] clck_gen.py:128 IND CLOCK 53040 2025-03-27 06:43:55 [DEBUG] clck_gen.py:128 IND CLOCK 53142 2025-03-27 06:43:56 [DEBUG] clck_gen.py:128 IND CLOCK 53244 2025-03-27 06:43:56 [DEBUG] clck_gen.py:128 IND CLOCK 53346 2025-03-27 06:43:57 [DEBUG] clck_gen.py:128 IND CLOCK 53448 2025-03-27 06:43:57 [DEBUG] clck_gen.py:128 IND CLOCK 53550 2025-03-27 06:43:57 [DEBUG] clck_gen.py:128 IND CLOCK 53652 2025-03-27 06:43:58 [DEBUG] clck_gen.py:128 IND CLOCK 53754 2025-03-27 06:43:58 [DEBUG] clck_gen.py:128 IND CLOCK 53856 2025-03-27 06:43:59 [DEBUG] clck_gen.py:128 IND CLOCK 53958 2025-03-27 06:43:59 [DEBUG] clck_gen.py:128 IND CLOCK 54060 2025-03-27 06:44:00 [DEBUG] clck_gen.py:128 IND CLOCK 54162 2025-03-27 06:44:00 [DEBUG] clck_gen.py:128 IND CLOCK 54264 2025-03-27 06:44:01 [DEBUG] clck_gen.py:128 IND CLOCK 54366 2025-03-27 06:44:01 [DEBUG] clck_gen.py:128 IND CLOCK 54468 2025-03-27 06:44:02 [DEBUG] clck_gen.py:128 IND CLOCK 54570 2025-03-27 06:44:02 [DEBUG] clck_gen.py:128 IND CLOCK 54672 2025-03-27 06:44:03 [DEBUG] clck_gen.py:128 IND CLOCK 54774 2025-03-27 06:44:03 [DEBUG] clck_gen.py:128 IND CLOCK 54876 2025-03-27 06:44:04 [DEBUG] clck_gen.py:128 IND CLOCK 54978 2025-03-27 06:44:04 [DEBUG] clck_gen.py:128 IND CLOCK 55080 2025-03-27 06:44:05 [DEBUG] clck_gen.py:128 IND CLOCK 55182 2025-03-27 06:44:05 [DEBUG] clck_gen.py:128 IND CLOCK 55284 2025-03-27 06:44:05 [DEBUG] clck_gen.py:128 IND CLOCK 55386 2025-03-27 06:44:06 [DEBUG] clck_gen.py:128 IND CLOCK 55488 2025-03-27 06:44:06 [DEBUG] clck_gen.py:128 IND CLOCK 55590 2025-03-27 06:44:07 [DEBUG] clck_gen.py:128 IND CLOCK 55692 2025-03-27 06:44:07 [DEBUG] clck_gen.py:128 IND CLOCK 55794 2025-03-27 06:44:08 [DEBUG] clck_gen.py:128 IND CLOCK 55896 2025-03-27 06:44:08 [DEBUG] clck_gen.py:128 IND CLOCK 55998 2025-03-27 06:44:09 [DEBUG] clck_gen.py:128 IND CLOCK 56100 2025-03-27 06:44:09 [DEBUG] clck_gen.py:128 IND CLOCK 56202 2025-03-27 06:44:10 [DEBUG] clck_gen.py:128 IND CLOCK 56304 2025-03-27 06:44:10 [DEBUG] clck_gen.py:128 IND CLOCK 56406 2025-03-27 06:44:11 [DEBUG] clck_gen.py:128 IND CLOCK 56508 2025-03-27 06:44:11 [DEBUG] clck_gen.py:128 IND CLOCK 56610 2025-03-27 06:44:12 [DEBUG] clck_gen.py:128 IND CLOCK 56712 2025-03-27 06:44:12 [DEBUG] clck_gen.py:128 IND CLOCK 56814 2025-03-27 06:44:13 [DEBUG] clck_gen.py:128 IND CLOCK 56916 2025-03-27 06:44:13 [DEBUG] clck_gen.py:128 IND CLOCK 57018 2025-03-27 06:44:13 [DEBUG] clck_gen.py:128 IND CLOCK 57120 2025-03-27 06:44:14 [DEBUG] clck_gen.py:128 IND CLOCK 57222 2025-03-27 06:44:14 [DEBUG] clck_gen.py:128 IND CLOCK 57324 2025-03-27 06:44:15 [DEBUG] clck_gen.py:128 IND CLOCK 57426 2025-03-27 06:44:15 [DEBUG] clck_gen.py:128 IND CLOCK 57528 2025-03-27 06:44:16 [DEBUG] clck_gen.py:128 IND CLOCK 57630 2025-03-27 06:44:16 [DEBUG] clck_gen.py:128 IND CLOCK 57732 2025-03-27 06:44:17 [DEBUG] clck_gen.py:128 IND CLOCK 57834 2025-03-27 06:44:17 [DEBUG] clck_gen.py:128 IND CLOCK 57936 2025-03-27 06:44:18 [DEBUG] clck_gen.py:128 IND CLOCK 58038 2025-03-27 06:44:18 [DEBUG] clck_gen.py:128 IND CLOCK 58140 2025-03-27 06:44:19 [DEBUG] clck_gen.py:128 IND CLOCK 58242 2025-03-27 06:44:19 [DEBUG] clck_gen.py:128 IND CLOCK 58344 2025-03-27 06:44:20 [DEBUG] clck_gen.py:128 IND CLOCK 58446 2025-03-27 06:44:20 [DEBUG] clck_gen.py:128 IND CLOCK 58548 2025-03-27 06:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 58650 2025-03-27 06:44:21 [DEBUG] clck_gen.py:128 IND CLOCK 58752 2025-03-27 06:44:22 [DEBUG] clck_gen.py:128 IND CLOCK 58854 2025-03-27 06:44:22 [DEBUG] clck_gen.py:128 IND CLOCK 58956 2025-03-27 06:44:22 [DEBUG] clck_gen.py:128 IND CLOCK 59058 2025-03-27 06:44:23 [DEBUG] clck_gen.py:128 IND CLOCK 59160 2025-03-27 06:44:23 [DEBUG] clck_gen.py:128 IND CLOCK 59262 2025-03-27 06:44:24 [DEBUG] clck_gen.py:128 IND CLOCK 59364 2025-03-27 06:44:24 [DEBUG] clck_gen.py:128 IND CLOCK 59466 2025-03-27 06:44:25 [DEBUG] clck_gen.py:128 IND CLOCK 59568 2025-03-27 06:44:25 [DEBUG] clck_gen.py:128 IND CLOCK 59670 2025-03-27 06:44:26 [DEBUG] clck_gen.py:128 IND CLOCK 59772 2025-03-27 06:44:26 [DEBUG] clck_gen.py:128 IND CLOCK 59874 2025-03-27 06:44:27 [DEBUG] clck_gen.py:128 IND CLOCK 59976 2025-03-27 06:44:27 [DEBUG] clck_gen.py:128 IND CLOCK 60078 2025-03-27 06:44:28 [DEBUG] clck_gen.py:128 IND CLOCK 60180 2025-03-27 06:44:28 [DEBUG] clck_gen.py:128 IND CLOCK 60282 2025-03-27 06:44:29 [DEBUG] clck_gen.py:128 IND CLOCK 60384 2025-03-27 06:44:29 [DEBUG] clck_gen.py:128 IND CLOCK 60486 2025-03-27 06:44:30 [DEBUG] clck_gen.py:128 IND CLOCK 60588 2025-03-27 06:44:30 [DEBUG] clck_gen.py:128 IND CLOCK 60690 2025-03-27 06:44:30 [DEBUG] clck_gen.py:128 IND CLOCK 60792 2025-03-27 06:44:31 [DEBUG] clck_gen.py:128 IND CLOCK 60894 2025-03-27 06:44:31 [DEBUG] clck_gen.py:128 IND CLOCK 60996 2025-03-27 06:44:32 [DEBUG] clck_gen.py:128 IND CLOCK 61098 2025-03-27 06:44:32 [DEBUG] clck_gen.py:128 IND CLOCK 61200 2025-03-27 06:44:33 [DEBUG] clck_gen.py:128 IND CLOCK 61302 2025-03-27 06:44:33 [DEBUG] clck_gen.py:128 IND CLOCK 61404 2025-03-27 06:44:34 [DEBUG] clck_gen.py:128 IND CLOCK 61506 2025-03-27 06:44:34 [DEBUG] clck_gen.py:128 IND CLOCK 61608 2025-03-27 06:44:35 [DEBUG] clck_gen.py:128 IND CLOCK 61710 2025-03-27 06:44:35 [DEBUG] clck_gen.py:128 IND CLOCK 61812 2025-03-27 06:44:36 [DEBUG] clck_gen.py:128 IND CLOCK 61914 2025-03-27 06:44:36 [DEBUG] clck_gen.py:128 IND CLOCK 62016 2025-03-27 06:44:37 [DEBUG] clck_gen.py:128 IND CLOCK 62118 2025-03-27 06:44:37 [DEBUG] clck_gen.py:128 IND CLOCK 62220 2025-03-27 06:44:38 [DEBUG] clck_gen.py:128 IND CLOCK 62322 2025-03-27 06:44:38 [DEBUG] clck_gen.py:128 IND CLOCK 62424 2025-03-27 06:44:38 [DEBUG] clck_gen.py:128 IND CLOCK 62526 2025-03-27 06:44:39 [DEBUG] clck_gen.py:128 IND CLOCK 62628 2025-03-27 06:44:39 [DEBUG] clck_gen.py:128 IND CLOCK 62730 2025-03-27 06:44:40 [DEBUG] clck_gen.py:128 IND CLOCK 62832 2025-03-27 06:44:40 [DEBUG] clck_gen.py:128 IND CLOCK 62934 2025-03-27 06:44:41 [DEBUG] clck_gen.py:128 IND CLOCK 63036 2025-03-27 06:44:41 [DEBUG] clck_gen.py:128 IND CLOCK 63138 2025-03-27 06:44:42 [DEBUG] clck_gen.py:128 IND CLOCK 63240 2025-03-27 06:44:42 [DEBUG] clck_gen.py:128 IND CLOCK 63342 2025-03-27 06:44:43 [DEBUG] clck_gen.py:128 IND CLOCK 63444 2025-03-27 06:44:43 [DEBUG] clck_gen.py:128 IND CLOCK 63546 2025-03-27 06:44:44 [DEBUG] clck_gen.py:128 IND CLOCK 63648 2025-03-27 06:44:44 [DEBUG] clck_gen.py:128 IND CLOCK 63750 2025-03-27 06:44:45 [DEBUG] clck_gen.py:128 IND CLOCK 63852 2025-03-27 06:44:45 [DEBUG] clck_gen.py:128 IND CLOCK 63954 2025-03-27 06:44:46 [DEBUG] clck_gen.py:128 IND CLOCK 64056 2025-03-27 06:44:46 [DEBUG] clck_gen.py:128 IND CLOCK 64158 2025-03-27 06:44:46 [DEBUG] clck_gen.py:128 IND CLOCK 64260 2025-03-27 06:44:47 [DEBUG] clck_gen.py:128 IND CLOCK 64362 2025-03-27 06:44:47 [DEBUG] clck_gen.py:128 IND CLOCK 64464 2025-03-27 06:44:48 [DEBUG] clck_gen.py:128 IND CLOCK 64566 2025-03-27 06:44:48 [DEBUG] clck_gen.py:128 IND CLOCK 64668 2025-03-27 06:44:49 [DEBUG] clck_gen.py:128 IND CLOCK 64770 2025-03-27 06:44:49 [DEBUG] clck_gen.py:128 IND CLOCK 64872 2025-03-27 06:44:50 [DEBUG] clck_gen.py:128 IND CLOCK 64974 2025-03-27 06:44:50 [DEBUG] clck_gen.py:128 IND CLOCK 65076 2025-03-27 06:44:51 [DEBUG] clck_gen.py:128 IND CLOCK 65178 2025-03-27 06:44:51 [DEBUG] clck_gen.py:128 IND CLOCK 65280 2025-03-27 06:44:52 [DEBUG] clck_gen.py:128 IND CLOCK 65382 2025-03-27 06:44:52 [DEBUG] clck_gen.py:128 IND CLOCK 65484 2025-03-27 06:44:53 [DEBUG] clck_gen.py:128 IND CLOCK 65586 2025-03-27 06:44:53 [DEBUG] clck_gen.py:128 IND CLOCK 65688 2025-03-27 06:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 65790 2025-03-27 06:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 65892 2025-03-27 06:44:54 [DEBUG] clck_gen.py:128 IND CLOCK 65994 2025-03-27 06:44:55 [DEBUG] clck_gen.py:128 IND CLOCK 66096 2025-03-27 06:44:55 [DEBUG] clck_gen.py:128 IND CLOCK 66198 2025-03-27 06:44:56 [DEBUG] clck_gen.py:128 IND CLOCK 66300 2025-03-27 06:44:56 [DEBUG] clck_gen.py:128 IND CLOCK 66402 2025-03-27 06:44:57 [DEBUG] clck_gen.py:128 IND CLOCK 66504 2025-03-27 06:44:57 [DEBUG] clck_gen.py:128 IND CLOCK 66606 2025-03-27 06:44:58 [DEBUG] clck_gen.py:128 IND CLOCK 66708 2025-03-27 06:44:58 [DEBUG] clck_gen.py:128 IND CLOCK 66810 2025-03-27 06:44:59 [DEBUG] clck_gen.py:128 IND CLOCK 66912 2025-03-27 06:44:59 [DEBUG] clck_gen.py:128 IND CLOCK 67014 2025-03-27 06:45:00 [DEBUG] clck_gen.py:128 IND CLOCK 67116 2025-03-27 06:45:00 [DEBUG] clck_gen.py:128 IND CLOCK 67218 2025-03-27 06:45:01 [DEBUG] clck_gen.py:128 IND CLOCK 67320 2025-03-27 06:45:01 [DEBUG] clck_gen.py:128 IND CLOCK 67422 2025-03-27 06:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 67524 2025-03-27 06:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 67626 2025-03-27 06:45:02 [DEBUG] clck_gen.py:128 IND CLOCK 67728 2025-03-27 06:45:03 [DEBUG] clck_gen.py:128 IND CLOCK 67830 2025-03-27 06:45:03 [DEBUG] clck_gen.py:128 IND CLOCK 67932 2025-03-27 06:45:04 [DEBUG] clck_gen.py:128 IND CLOCK 68034 2025-03-27 06:45:04 [DEBUG] clck_gen.py:128 IND CLOCK 68136 2025-03-27 06:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 68238 2025-03-27 06:45:05 [DEBUG] clck_gen.py:128 IND CLOCK 68340 2025-03-27 06:45:06 [DEBUG] clck_gen.py:128 IND CLOCK 68442 2025-03-27 06:45:06 [DEBUG] clck_gen.py:128 IND CLOCK 68544 2025-03-27 06:45:07 [DEBUG] clck_gen.py:128 IND CLOCK 68646